10.
Circuit Diagrams and PWB Layouts
SSB: I2C Busses
C
IADK D
8
17
16
6
7
8
9
IAD
3
C4
3
ADK G4
6
7
14
15
16
2ADF F9
2ADG F9
3
AD1 C2
3
AD2 C
3
E
2AD5 C4
2AD6 C4
2AD7 E4
2AD
8
E4
2AD9 F4
2ADA I5
2ADB I5
2ADC I5
2ADD I7
2ADE I7
A
B
C
D
3
ADJ-4 C9
E
F
15
N
O
P
10
7
8
9
10
11
12
1
2
3
4
5
FAD
8
F9
FAD9 F4
IAD1 C4
IAD2 C4
K
J
8
9
10
11
12
1
3
I
H
A
17
1
8
19
3
AD
3
D4
H
I
IADF C
8
IADG C
8
IADH C
8
IADJ C
8
6
14
1
3
12
11
10
All right
s
re
s
erved. Reprod
u
ction in whole or in p
a
rt
s
i
s
prohi
b
ited witho
u
t the written con
s
ent of the copyright
owner.
K
A
G
P
O
N
3
AN6 H2
3
AN7 H2
5AD1 E4
5AD2 E4
7AD1 B5
FAD1 F4
FAD2 F4
FAD
3
G4
FAD4 G4
FAD5 H6
FAD6 H7
FAD7 E9
IADE C
8
G
F
E
D
C
H
I
J
L
1
IADL D
8
IADM C10
IADN C10
IADP C10
IADQ C10
IADR C10
IAD
S
C10
IADT D10
IADU D10
3
ADH-4 C9
3
ADJ-1 D9
3
ADJ-2 D9
3
ADJ-
3
C9
4
5
1
8
9
8
7
6
5
B
3
2
1
2
3
20
IAD4 C4
IAD5 C4
IAD7 C
3
IAD
8
C4
IAD9 E4
IADA E4
IADB H6
IADC H
8
IADD C
8
5
3
ADE G9
3
ADF E9
3
ADG F9
3
ADH-1 C9
3
ADH-2 C9
3
ADH-
3
C9
B
M
M
L
F
G
H
I
1AD1 F
8
2AD1 C4
2AD2 C4
2AD
3
C4
2AD4 C4
1
2
3
I
2
C
a
ddre
ss
= 4A (write)
19
3
AD4 F
3
3
AD5 F4
3
AD6 F4
3
AD7 F4
3
AD
8
G
3
3
AD9 F
3
3
ADB H6
3
ADC H7
3
ADD H7
4
20
C
D
11
12
A
I
2
C B
uss
e
s
B
C
D
E
F
G
4
100n
2ADB
16
V
SS
DE1
3
5
V
SS
DE2
3
1
XTAL
3
2
XTALI
3
ADK
1K0
VP5
1
3
VP6
12
VP7
11
V
SS
A0
2
V
SS
A1
V
SS
A2
41
V
SS
D1
2
8
3
0V
SS
DA
1
8
VDDDE1
3
4
VDDDE2
22
VP0
21
VP1
20
VP2
19
VP
3
15
VP4
14
TDO
3
9
TM
S
TR
S
T
8
10
VDDA0
3
VDDA1
42
VDDA2
29
VDDD1
33
VDDDA
LLC
25
RTCO
26
RT
S
0
27
RT
S
1
24
S
CL
2
3
S
DA
3
7
TCK
38
TDI
3
6
7
AI12
5
AI1D
4
3
AI21
1
AI22
44
AI2D
9
AOUT
40
CE
17
VBI DATA
MULTI-
S
TANDARD
DATA
S
LICER
CIRCUIT
AGND
6
4
AI11
S
ATURATION
BRIGHTNE
SS
CHROMINANCE
CONTROL
PROCE
SS
ING
ANALOG
S
YNCHRONIZATION
ON
CONTROL
POWER
GENER’N
CLOCK
C-BU
S
CLOCK
S
INTERFACE
CONTROL/
2
I
FORMATTER
OUTPUT
S
CAN
AND
S
CAN
BOUNDARY
A/D
AND
PROCE
SS
ING
ANALOG
TE
S
T
S
AA711
3
7AD1
IADJ
CONTROL
TE
S
T
CONVER
S
ION
LUMINANCE
FILTER
UP
S
AMPLING
BYPA
SS
CONTRA
S
T
IADH
33
R
3
ADH-4
4K7
3
AD4
IAD4
3
ADH-
3
33
R
10p
2ADF
33
R
3
ADJ-
3
1
8
R
3
AD1
IADM
FAD1
3
ADG
33
R
IAD9
33
R
3
ADF
3
AN7
FAD5
4K7
3
ADJ-4
33
R
4K7
3
ADB
IADD
IADR
IADC
FAD9
1AD1
24.576M
3
ADD
IADN
10K
47n
2AD2
47n
2AD
3
3
ADH-2
2ADA
100n
33
R
IAD
S
IADT
IADK
2AD4
47n
FAD
8
2ADE
100n
IADB
FAD7
IADU
IAD5
IAD
8
+
3
V
3
2AD7
22
u
10V
33
R
3
ADJ-1
3
AD5
4K7
3
AD6
100R
A2
PB522
PCB
S
B PB522 He
a
lthc
a
re
2AD6
47n
DATE
NAME
1
S
UPER
S
.
CLA
SS
_NO
2
2
5
B
P
E
M
A
N
T
E
S
N
H
C
4
3
3
PC
33
2
41
200
8
-02-2
8
ROYAL PHILIP
S
ELECTRONIC
S
N.V. 2007
200
8
-04-25
DC
3
07
3
67
YiPing G
u
o
200
8
-04-1
8
3
1
3
0
IADQ
3
1
3
9 2
83
3
00
3
CHECK
IADP
FAD
3
+
3
V
3
3
AD9
4
K7
3
ADH-1
33
R
IAD1
IAD
3
IADG
+
3
V
3
3
ADJ-2
33
R
FAD2
75R
3
AD
3
FAD6
+
3
V
3
+
3
V
3
IADE
IADF
5AD1
3u3
3u3
5AD2
IAD2
4K7
3
AD
8
2ADG
10p
4K7
3
AN6
2AD1
47n
IADL
IADA
33
R
3
ADE
3
ADC
4
K7
IAD7
+
3
V
3
100n
2ADC
FAD4
+
3
V
3
3
AD2
56R
2ADD
22
u
16V
2AD9
100n
100R
3
AD7
47n
2AD5
100n
2AD
8
DVID1
S
DA-
SS
B
S
CL-
SS
B
CVB
S
-BO
CLK_REF
S
DA-
SS
B
S
CL-
SS
B
DVID0
DVID2
DVID
3
DVID4
DVID5
DVID6
DVID7
1
8
710_540_090
8
24.ep
s
090
8
24