IC Data Sheets
8.
8.6
Diagram B12A, TDA1517ATW/N1 (IC 7111)
Not available at time of issue.
8.7
Diagram T01A, TDA10060 (IC7T18)
Figure 8-5 Internal block diagram and pin configuration
Block Dia
g
ram
Pin Confi
g
uration
PSC/SPI SLAVE
INTERFACE
IN-BAND AFE
PGA
12-bit A/D
AGC CONTROL
OUT-OF-BAND
AFE PGA
6-bit A/D
AGC CONTROL
VCO
OUT-OF-BAND
QPSK
RECEIVER
DVS-167 FEC
DVS-178 FEC
ACQUISITION
PROCESSOR
JTAG
INTERFACE
EIA/CEA-909
INTERFACE
GPIO/GPO
INTERFACE
PSC MASTER
INTERFACE
ATSC 8/16 VSB
ADVANCED
RECEIVER
MASTER
PLL
IN-BAND
OUTPUT
INTERFACE
OUT-OF-BAND
OUTPUT
INTERFACE
ATSC FEC
TDA10060
ATSC 8/16 VSB
ADVANCED
RECEIVER
ITU-T J.83
ANNEX
A/B/C FEC
internal bus
to all blocks
HAB
PSC/SPI host
interface
54 MHz
third overtone
crystal
MPEG
transport
out-of-band
transport
for CableCard/
POD
interrupt
in-band tuner
out-of-band tuner
out-of-band AGC
out-of-band VCO
tuner/peripheral
control
GPIO
GPO
antenna
control
JTAG
controller
in-band AGT
in-band AGI
in-band AFT
TDA10060HL
108
37
72
14
4
10
9
73
1
36
H_16
8
00_02
8
.ep
s
111007