9.
Block Diagrams
I
2
C IC Overview
I²C
PNX
8
5xx: CONTROL
B0
3
C
PACIFIC
3
B10C
3
TH HDMI
H
FPGA 10
8
0P: I/O BANK
S
B09D
PNX
8
5xx:
S
TANDBY CONTROLLER
B0
3
B
PACIFIC
3
: DI
S
PLAY-INTERFACING
B10B
S
UPPLY
B09A
S
PDIF DEBUG / R
S
2
3
2 INTERFACE
B06A
PNX
8
5xx: DIGITAL VIDEO OUT / LVD
S
B0
3
H
HDMI
S
WITCH
B06C
HDMI
B06B
PRO: IDIOM
B02A
EXTERNAL VIDEO
B07C
IBOARD
B12B
CHANNEL DECODER
T01A
PACIFIC
3
: LVD
S
B10A
T01B
MAIN TUNER
HDMI BOARD
1
8
1B10
3
1
I2C1
S
DA
I2C1-
S
CL
AK27
S
DA1
S
CL1
S
DA-
S
LAVE
S
CL-
S
LAVE
3
HPE
3
HPD
S
DA-
SS
B
S
CL-
SS
B
AJ27
7H00
PNX
8
5xx
AJ2
8
+
3
V
3
-PER
3
HPM
3
HPK
3
HPJ
3
HPH
19
1
1
8
2
19
1
1
8
2
2x HDMI
CONNECTOR
7JA1
M24C02
EEPROM
5
6
3
JA
8
3
JA
7
5
6
3
JB
8
3
JB7
7JB1
M24C02
EEPROM
8
5
8
6
9
3
94
8
0
8
1
ARX-DDC-
S
DA
ARX-DDC-
S
CL
BRX-DDC-
S
DA
BRX-DDC-
S
CL
PARX-DDC-
S
DA
PARX-DDC-
S
CL
PBRX-DDC-
S
DA
PBRX-DDC-
S
CL
I2C
3
-
S
DA
I2C
3
-
S
CL
I2C2-
S
DA
I2C2-
S
CL
ERR
5
3
3
JA0
3
JB1
3
JB0
S
DA
3
S
CL
3
AK2
8
AK29
S
DA2
S
CL2
S
DA-UP-MIP
S
S
CL-UP-MIP
S
AH27
9HP6
9HP5
9HP
8
9HP7
3
HPG
3
HPF
S
DA-2
S
CL-2
19
8
200
7GE2-2
T6TF4AFG
PACIFIC
3
3
GG2
3
GG
3
C1
C2
7F90
EP2C5F256C7N
CYCLONE II
FPGA 10
8
0P
3
F95
3
F9
8
AH
3
AG4
3
H41
3
H
38
B0
3
B
+
3
V
3
-
S
TANDBY
3
H0
3
3
H02
5
6
7HC
3
M24C64
EEPROM
(MAIN NVM)
RE
S
ET-NVM_WP-NANDFLA
S
H
E10
C9
DDC-
S
DA
DDC-
S
CL
I2C
u
P-
S
DA
I2C
u
P-
S
CL
3
F9
3
3
F94
E1
E2
S
DA-AMBI-
3
V
3
S
CL-AMBI-
3
V
3
7G61-2
7G61-1
3
B59
3
B5
8
+5V-ON
3
GA
3
3
GA0
+
3
V
3
S
DA-AMBI
S
CL-AMBI
5B12
5B10
RXD
TXD
AB1
AC5
3
H59
3
H61
3
HWM
3
HWN
3
JE1
3
JE0
RXD-UP
TXD-UP
RXD
TXD
E27
D2
8
RXD-MIP
S
TXD-MIP
S
7HC0
74HC4066PW
9
2
RXD
TXD
10
3
3
HC
3
3
HC6
10
9
R2-OUT
T2-IN
8
7
RXD_PC
TXD_PC
T2-OUT
R2-IN
7JE2
S
T
3
2
3
2C
1M15
2
3
UART
S
ERVICE
CONNECTOR
B0_UART
B1_UART
AF15
AK16
DV-B0_UART2-RX
DV-B1_UART2-TX
B0
3
H
11
12
R1-OUT
T1-IN
50
49
7J00
AD
8
197AA
S
TZ
HDMI
S
WITCH
ERR
2
3
ERR
46
ERR
2
8
3
J01
3
J00
90
8
9
1JA0
16
15
1JB0
16
15
AIN-5V
3
JA
6
3
JA
5
BIN-5V
3
JB6
3
JB5
5
6
3
J4
8
3
J47
7J41
M24C02
EEPROM
BIN-5V
3
JB6
3
JB5
19
1
1
8
2
9
8
99
CRX-DDC-
S
DA
CRX-DDC-
S
CL
PCRX-DDC-
S
DA
PCRX-DDC-
S
CL
3
J41
3
J40
1102
16
15
TO AMBI-LIGHT
MODULE
RE
S
ERVED
7H02
M25P05
512K
FLA
S
H
U4
UART-
S
WITCH
UART-
S
WITCHn
DDC-
S
DA
DDC-
S
CL
B0
3
G
HDMI
S
TANDBY
CONTROL
4
11
R
S
2
3
2
INTERFACE
1
8
710_405_090
8
24.ep
s
090
8
26
VID_OUT
TTL
ERR
1
3
V
3
7HC4
7HC1
8
3
JA1
UART
LEVEL ADAPTER
5
12
1
6
10
11
5
15
3
010
3
00
8
EEPROM
256x
8
VGA
CONNECTOR
S
DA_VGA
S
CL_VGA
R
S
RX
R
S
TX
RXD0
TXD0
5
6
1002-2
12
15
1002-1
2
3
DDC-5V
7020
M24C02
1
6
5
10
5002
500
3
1HP0
3
1
2
1
2
S
DA-
SS
B-MUX1
S
CL-
SS
B-MUX1
+
3
V
3
-
S
TANDBY
3
HPX
3
HPZ
+
3
V
3
-ANA
3
HPX
3
HPZ
3
HP
S
3
HPR
4
5
7HP5
PCA9540BDP
9G5
3
9G54
S
DA-I2C4-DI
S
P
S
CL-I2C4-DI
S
P
1G50
1
2
3
G25
3
G24
LVD
S
COONECTOR
TO DI
S
PLAY
N.C.
S
DA-
SS
B-MUX2
S
CL-
SS
B-MUX2
+
3
V
3
-
S
TANDBY
3
HPY
3
HPC
3
HPU
3
HPW
7
8
3
HPA
3
HPB
ERR
11
ERR
12
ERR
24
2 CHANNEL
I2C
MULTIPLEXER
29
3
0
7222
UP
S
D
3333
D
MCU
3
241
3
242
7270
2
3
24
11
10
1
3
14
12
11
E14
D14
7B01
LGDT1129
PRO IDIOM
3
C01
3
C00
PI-
S
DA
PI-
S
CL
1C01
1T12
7
7
8
8
1J40
1101
17
7
16
8
1C00
1T1
3
16
16
15
15
70
69
7T1
8
TDA10060HL
DTV
RECEIVER
ERR
3
7
3
T
38
3
T
3
7
S
DA-
SS
B
S
CL-
SS
B
S
DA-
SS
B
S
CL-
SS
B
S
DA-
SS
B1
S
CL-
SS
B1
S
DA-
SS
B-MUX2
S
CL-
SS
B-MUX2
2
3
24
7T57
TDA9
8
9
8
HL
IF
PROCE
SS
ING
ERR
26
3
T57
3
T56
7
6
1T04
TD17
3
6F/FH
TUNER
ERR
3
4
3
T77
3
T5
3
5
6
72
8
0
M24C
3
2
EEPROM
4Kx
8
S
DA1_iB
S
CL1_iB
42
4
8
4
3
46
S
DA_I2C
S
PI_CLK
S
PI_DATA_IN
S
PI_CLK
IR_OUT
IR-IN_DATA_IN_RXD_
S
DA1
1240
9
1
2
3
HPT
3
HPQ
PDRX-DDC-
S
DA
PDRX-DDC-
S
CL
RXD_PC
TXD_PC
3
J12
3
J11
ERR
76
ERR
75
3
21
8
3
219
3
2
8
0
3
2
8
1
5VA
3
205
3
212
5VA
1250
1
2
RJ12
+
3
V
3
-
S
TANDBY
3
H5
8
3
H60
3
JC4
3
JC5
S
PI_DATA_OUT
4
3
244
EF
720
8
CONTROL
B0
3
F
PNX
8
5xx: FLA
S
H
B0
3
E
PNX
8
5xx:
S
DRAM
7HG0
EDE2516AC
S
E
DDR2
S
DRAM
8
Mx16x4
7HG1
EDE2516AC
S
E
DDR2
S
DRAM
8
Mx16x4
DDR2-D(0-15)
DDR2-A(0-12)
(16-
3
1)
(0-12)
7HA0
NAND512W
3
A2CN6E
PCI --> NAND
NAND
FLA
S
H
512Mx
8
CONTROL
B0
3
D
S
DRAM
B0
3
E
DDR
PCI XIO