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Block Diagrams, Test Point Overview, and Waveforms
47
Q523.1U LA
6.
Block Diagram Video
B03B
MAIN TUNER
VIDEO
B03A
CHANNNEL DECODER
B04
PNX85xx
D
SIDE FACING SIDE AV
B09A
USA EXTERNALS
B09B
B06A
PACIFIC 3: LVDS
B06C
PACIFIC 3
B05C
FPGA 1080P: I/O BANKS
B04Q
PNX85xx: FLASH
B08F
HDMI SWITCH
B08D
HDMI
B04G
PNX 85xx: SDRAM
B05A
FPGA 1080P:
I/O BANKS
AB02
VIDEO FLOW
AB06
FPGA DFI
AB02
VIDEO FLOW
DYNAMIC FRAME INSERTION
1
4
5
1T06
H_16770_071.eps
070907
1T04
TD1736OF/FHFXP
MAIN HYBRID
TUNER
11
1
4
5
1T55
3
IF-OUT
SAW 44MHz
IF-OUT
4-MHZ
ERF-GAIN
V2
9
VTU
SAW 45MHz
IF-FILTP1
IF-FILTN1
IF-FILTP3
IF-FILTN3
7T57
TDA9897HL/V2
IF
PROCESSING
7
6
3
4
47
TUN-AGC
8
46
4-MHz
IF1-B
IF1-A
IF3-A
IF3-B
TAGC
FREF
FM-TRAP-SWITCH
7T12
FM-TRAP
4
33
CVBS4
EF
7T59
CVBS
26
TDA-IF-IN-N
OUT1-A
27
TDA-IF-IN-P
OUT1-B
IF-N
IF-P
3T59
3T58
7T18
TDA10060HL
DTV
RECEIVER
142
AGCT_CTL
XTAL-P
XTAL-N
7
IF-P
8
IF-N
DATA
36
AGC-DIN
TDA-IF-AGC
FE-DATA(0-7)
IF-OUT
4
IF2-B
16
TUN-AGC-MON
MPP-2
115
GPIO-2
7T06
3
GPIO-0
141
AGCT-CTL
1T69
54M
21
20
7J00
PNX8537E
PNX85xx
7HG0
K4D551638F
DDR
SDRAM 1
8Mx16x4
7HG1
K4D551638F
DDR
SDRAM 2
8Mx16x4
DDR2-D(0-15)
DDR2-A(0-12)
(16-31)
(0-12)
1008
AV1_Y
AV1_PB
AV1_PR
PB
PR
Y
AV1
1009
AV3_Y
AV3_PB
AV3_PR
PB
PR
Y
AV3
1
5
S VIDEO
2
4
3
1007
1006
VIDEO
AV1_Y-CVBS
AV1_C
1011
VIDEO
AV2_Y-CVBS
AV2
FRONT_Y-CVBS
FRONT_C
2
4
1304
1M36
2
4
1
5
S VIDEO
2
4
3
1301
1302
VIDEO
FRONT_Y_CVBS_IN
FRONT_C_IN
7J27
AD8191ASTZ
HDMI
SWITCH
33
ON0
RXC+
RXC-
RX0+
RX0-
RX1+
RX1-
RX2+
RX2-
34
36
37
39
40
42
43
OP0
ON1
OP1
ON2
OP2
ON3
OP3
28
27
1G50
TXEC+
5G02
TXEC-
25
24
5G03
TXECLK-
22
21
TXED+
5G04
TXED-
20
19
TXEE+
5G05
TXEE-
17
16
TCOA+
5G06
TXOA-
15
14
TCOB+
5G07
TCOB-
13
12
TCOC+
5G08
TCOC-
10
9
5G09
TCOCLK-
7
6
TCOD+
5G10
TCOD-_
5
4
TCOE+
5G11
TCOE-
TXEA+
5G00
TXEA-
30
29
TXEB+
TXEB-
32
31
5G01
7GE2
T6TF4HFG
PACIFIC3
PICTURE
ENHANCEMENT
80
81
83
84
86
87
89
90
92
93
95
96
98
99
100
101
102
103
106
107
74
75
77
78
16
15
20
19
23
22
26
25
29
28
31
31
35
34
38
37
41
40
45
44
10
8
14
13
7F90
EP2C8F256C7N
CYCLONE
II
FPGA
1080P
DV-R(0-7)
DV-G(0-7)
DV-B(0-7)
DV-HS
DV-VS
D13
G13
AG15
AH15
T
TxFPGAoC-
TxF
TxFPGAoCLK-
T
TxFPGAoD-
T
TxFPGAoE-
T
TxFPGAeA-
T
TxFPGAeB-
T
TxFPGAeC-
TxF
TxFPGAeCLK-
T
TxFPGAeD-_
T
TxFPGAeE-
T
TxFPGAoA-
T
TxFPGAoB-
A13
B13
A12
B12
D10
D11
A10
B10
B7
A7
C6
D6
A6
B6
A5
B5
A4
B4
A3
B3
A14
B14
C12
C13
7GE1
M25P05
512K
FLASH
7HA0
NAND512W3A2BN6E
PCI --> NAND
NAND
FLASH
128Mx8
SWITCH/
ADC/MUX/SRC
MSP
VMPG
MPEG
DEMUX
AND
DECODING
VIDEC, 3D COMB AND VBI
CAPTURING
HDMI-DVI RX/RX2DTL
RECEIVER
DETECTION
MATRICING
VIDEO
OUTPUT
CONFIG
LVDS
TRANSMITTER
GFX LAYER
STILL
MPEG/PC
VIDEO
LAYER
GFX OSD
LAYER
CPIPE-TV
MBVP-TV
SNR/TNR
EDDI
HV SCALER
MEMORY
CONTROLLER
MAIN
VIDEO OUT
19
1
18
2
1
1B01
3
4
7
9
10
12
15
6
16
19
ARX2+
ARX2-
ARX1+
ARX1-
ARX0+
ARX0-
ARXC+
ARXC-
ARX-DCC-SCL
ARX-DCC-SDA
ARX-HOTPLUG
HDMI 1
CONNECTOR
19
1
18
2
1
1B02
3
4
7
9
10
12
15
6
16
19
BRX2+
BRX2-
BRX1+
BRX1-
BRX0+
BRX0-
BRXC+
BRXC-
BRX-HOTPLUG
HDMI 2
CONNECTOR
BRX-DCC-SCL
BRX-DCC-SDA
7JE3
HOT-PLUG
7JA3
HOT-PLUG
19
1
18
2
1
1B03
3
4
7
9
10
12
15
6
16
19
CRX2+
CRX2-
CRX1+
CRX1-
CRX0+
CRX0-
CRXC+
CRXC-
CRX-DCC-SCL
CRX-DCC-SDA
CRX-HOTPLUG 7J28
HOT-PLUG
B04H
B04H
B04H
ANALOGUE AV
B04K
J3
M1
M2
K2
P5
F2
H2
N4
J1
K3
R1
G1
J2
P2
A10
A9
B7
B6
A8
A7
B9
B8
DIGITAL VIDEO
IN
B04H
VIDEO
STREAMS
B04N
CONTROL
B04F
13
PCEC-HDMI
13
PCEC-HDMI
13
PCEC-HDMI
B04A
B04A
B04A
_B4
RxP3oC-_B5
R_B2
RxP3oCLK-_B3
_B0
RxP3oD-_B1
_G8
RxP3oE-_G9
_G6
RxP3eA-_G7
_G4
RxP3eB-_G5
_G2
RxP3eC-_G3
R_G0
RxP3eCLK-_G1
_R8
RxP3eD-_R9
_R6
RxP3eE-_R7
_B8
RxP3oA-_B9
_B6
RxP3oB-_B7
SDRAM
B04G
DDR
PCI XIO
DUAL LVDS ONLY
RESET-SYS-DETECT
B04E
44
ARX2+
ARX2-
ARX1+
ARX1-
ARX0+
ARX0-
ARXC+
ARXC-
BRX2+
BRX2-
BRX1+
BRX1-
BRX0+
BRX0-
BRXC+
BRXC-
CRX2+
CRX2-
CRX1+
CRX1-
CRX0+
CRX0-
CRXC+
CRXC-
74
73
71
70
68
67
65
64
12
11
9
8
6
5
3
2
24
23
21
20
18
17
15
14
HDMI 3
CONNECTOR
LVDS
CONNECTOR
TO DISPLAY
OR
AB08
DDR B
AB07
DDR A
AB05
FPGA: POWER +
CONTROL
AB03
CLOCK
1F51
LVDS
CONNECTOR
TO DISPLAY
1F52
5
4
3
9
40
49
50
1
32
2
1
VDISP
1F50
10
11
12
13
14
15
17
18
20
21
22
23
25
26
27
28
39
30
32
33
35
36
37
38
40
7F18
EP2C35F484C7N
CYCLONE II
FPGA
DFI
7CA0
EDD1216AJTA
DDR
SDRAM 1
2Mx16
7CA1
EDD1216AJTA
DDR
SDRAM 2
2Mx16
DQ2(0-15)
MM2-A(0-11)
(16-31)
(0-12)
7CA2
EDD1216AJTA
DDR
SDRAM
2Mx16
7CA3
EDD1216AJTA
DDR
SDRAM
2Mx16
DQ1(0-15)
MM1-A(0-11)
(16-31)
(0-11)
LVDS
CONNECTOR
TO DISPLAY
RXEB-
RXEA+
RXED-
RXEE-
RXED+
RXOA-
RXEE+
RXOB-
RXOA+
RXOC+
RXOC-
RXOCLK-
RXOD+
RXOD-
RXOE+
RXOE-
RXOB+
RXEC+
RXECLK-
RXEB+
RXEC-
RXEA-
D2
D3
E2
D1
E4
E1
F2
E3
G5
F1
H4
G6
H2
G3
L2
H1
J2
L1
H6
J1
C1
D4
C2
H5
SDA-I2C4-DISP
SCL-I2C4-DISP
1
2
3
4
+12V-SSB
41
SCL-I2C4-SSB
SDA-I2C4-SSB
7F30
EPCS16SI16N
SCD
7
16
15
C3
L6
C4
nSCO
DCLK
ASDO
7F51
1
W4
SS-OFF
CLK-SYSTEM-SS
50M
EOH
OUT
B12
3
Only for 120Hz Dynamic Frame Insertion