3
TPS 1.0L LA
1. Technical Specifications, Connections and Chassis Overview
Level: - Nominal
: 0.5 V rms.
- Maximum : 1.5 V rms.
- Impedance > 10 k
W
.
Audio (2) R/L for SCART IN
Level: - Nominal
: 0.5 V rms.
- Maximum : 1.5 V rms.
- Impedance > 10 k
W
.
Audio (3) Mini-jack audio for DVI
Headphone
Audio: R/L output -10mW at 32
W
.
3.5mm stereo jack with switch
Impedance is between 8 and 600
W
.
1.2.3 VGA Pin assignment
PIN No. SIGNAL
1
Red video input
2
Green video input /SOG
3
Blue video input
4
GND
5
GND– cable detect
6
Red video ground
7
Green video ground
8
Blue video ground
9
DDC +3.3V (or 5V)
10
Logic ground
11
GND
12
Serial data line (SDA)
13
H. Sync / H+V
14
V. Sync
15
Data clock line (SCL)
1.2.4 24-pin DVI-D digital connect of signal cable.
1
T.M.D.S. Data2-
2
T.M.D.S. Data2+
3
T.M.D.S. Data2/4 Shield
4
No connect
5
No connect
6
DDC Clock
7
DDC Data
8
No connect
9
T.M.D.S. Data1-
10
T.M.D.S. Data1+
11
T.M.D.S. Data1/3 Shield
12
No connect
13
No connect
14
+5V Power
15
Ground (for +5V)
16
Hot Plug Detect
17
T.M.D.S. Data0-
18
T.M.D.S. Data0+
19
T.M.D.S. Data0/5 Shield
20
No connect
21
No connect
22
T.M.D.S. Clock Shield
23
T.M.D.S. Clock+
24
T.M.D.S. Clock-
1.2.5 CVBS
PIN SIGNAL
1
GND
2
CVBS
3
CVBS
4
CVBS
1.2.6 S-Video
The input signals are applied to display through CVBS cable
Pin assignment
The input signals are applied to display through S-Video cable
Pin assignment
PIN SIGNAL
1
GND
2
GND
3
GND
4
GND
5
GND
6
LUMA
7
CHROMA
1.2.7 Component Video
The input signals are applied to display through Component Video
RCA
J
ack pin assignment
PIN SIGNAL
1
GND
2
Red
à
Pr
3
GND
4
Blue
à
Pb
5
GND
6
Green
à
Y
RF Signal: Aerial input / 10mV(typical: 80dBuV; range: 30-100dBuV)
Video signal : CVBS input ( RCA jack) / 1Vpp (300mV-sync,
700mV-video.)
S video input / 1VppY-signal, +/-300mV C-signal
Comp video in(YPbPr input)/ 1Vpp Y signal,
+/-350mV Pb,Pr signal
DVI-D:Digital interface with 4 channels TMDS signal
Audio signal : Audio
(1) R/L for AV IN(AV and S-Video).
Summary of Contents for 19PFL4322
Page 7: ...7 TPS 1 0E LA 3 Directions for Use 3 Directions for Use Refer to page 6 ...
Page 36: ...36 TPS 1 0L LA 7 Circuit Diagrams and PWB Layouts Scaler Board Layout Top Side Part 1 ...
Page 37: ...37 TPS 1 0L LA 7 Circuit Diagrams and PWB Layouts Scaler Board Layout Top Side Part 2 ...
Page 38: ...38 TPS 1 0L LA 7 Circuit Diagrams and PWB Layouts Scaler Board Layout Top Side Part 3 ...
Page 39: ...39 TPS 1 0L LA 7 Circuit Diagrams and PWB Layouts Scaler Board Layout Top Side Part 4 ...
Page 40: ...40 TPS 1 0L LA 7 Circuit Diagrams and PWB Layouts Scaler Board Layout Bottom Side ...
Page 41: ...41 TPS 1 0L LA 7 Circuit Diagrams and PWB Layouts Scaler Board Layout Bottom Side of part 1 ...
Page 42: ...42 TPS 1 0L LA 7 Circuit Diagrams and PWB Layouts Scaler Board Layout Bottom Side of part 2 ...
Page 43: ...43 TPS 1 0L LA 7 Circuit Diagrams and PWB Layouts Scaler Board Layout Bottom Side of part 3 ...
Page 44: ...44 TPS 1 0L LA 7 Circuit Diagrams and PWB Layouts Scaler Board Layout Bottom Side of part 4 ...
Page 57: ...57 TPS 1 0L LA 7 Circuit Diagrams and PWB Layouts IR Board Layout Bottom Side ...
Page 72: ...72 TPS 1 0L LA 9 Circuit Descriptions Abbreviations List and IC Data Sheets PIN Assignments ...
Page 74: ...74 TPS 1 0L LA 9 Circuit Descriptions Abbreviations List and IC Data Sheets Pin assignments ...