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Functional
Section 4
RCP-GPIO
page 4.3
10/96
P/N 81905903860
F UNCTIONAL
4
DE SCRIPTI ON
The processor provides the TX_ENABLE signal under software control at
U35 pin 25. This signal is connected to the RS485 transceiver at U37 pin
3. When TX_ENABLE is asserted (high), U37 drives the RS485 bus (U37
pins 6 and 7 to J4 pins 1 and 3). When TX_ENABLE is negated (low),
U37 ceases driving the bus and allows other devices to drive the bus. Dur-
ing reset, the TX_ENABLE signal from the processor is initialized to an in-
put and is not driven to a particular state. A pull-down resistor (R35) has
been added to ensure that U37 does not drive the RS485 bus during
power-up or other reset conditions. A shield connection is provided for the
RS485 bus on J66 pin 2.
LED Driver Support
The 68HC11 processor uses the internal synchronous peripheral interface
(SPI) under software control to drive the GPIO Interface Card's LED cir-
cuitry. LDATA is presented as serial bit stream on U36 pin 25. LCLK is
presented on U36 pin 24. U36 accepts LDATA on the rising edge of LCK.
The data stream generated is compatible with that required by National
MM5450 LED driver chips.
Inputs Scan
The GPIO Interface Card contains circuitry capable of scanning up to 64
inputs. The scan circuit is arranged as an eight row by eight column array.
While the scan circuitry is capable of serving 64 push-buttons, the GPIO
Interface Card has circuitry for 32 inputs. To scan the inputs, the micropro-
cessor performs read cycles that enable KRD_SEL. This occurs for the
address range of 800h to FFFh. KRD_SEL provides an active low chip se-
lect for the bus transceiver (U1 pin 19). The three least significant address
bits (A0-A2) are connected to the input of the decoders (U38 pins 1, 2,
and 3). One of the eight active low outputs of the decoders is selected by
placing the appropriate address on the input of the decoders. Since partial
decoding is used, the keyboard circuitry is mapped to several addresses
within the KRD_SEL address range. The software in the microprocessor
only uses the lowest available addresses to access the keyboard.
4.2 GPIO Interface Card Continued:
RS485 Communications Continued: