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Model 52791 Getting Started Guide

Rev. 1.0

GateFlow FPGA Design Kit

The following software and hardware is required to use the GateFlow FPGA Design 

Kit: 

Xilinx's ISE Design Suite

 (Version 14 or later).

v7_flash.exe: 

The FLASH memory on Model 52791 provides nonvolatile storage for 

the configuration data which is loaded into the FPGA upon power

up. New config

uration data may be downloaded directly to the FLASH Memory the via PCIe, using 

a command

line utility program provided with the ReadyFlow device drivers for 

Model 52791, called 

v7_flash.exe

. Details about using 

v7_flash.exe

 are provided in 

Chapter 2, Section 2.4.2 of the GateFlow user manual.

Pentek Model 71605 JTAG PCB: 

This JTAG adaptor, which comes already installed 

on Model 52791, is used for downloading new configuration code. After completing 

the development of your changes to the standard Pentek factory

 supplied configu

ration, you should remove the JTAG PCB.

Xilinx’s Platform Cable: 

To connect to your development computer system you will 

need one of the following two cables, purchased from Xilinx: 

• Platform Cable USB (DLC

9, Xilinx part # HWUSB

G)

• Platform Cable USB II (DLC10, Xilinx part # HWUSB

II

G)

The Platform USB cable connects to a USB port on your development computer 

system, and thus carries its own 5V supply connection. The other end of both cables 

terminates in a pod, which contains a shrouded connector for a 14

pin, 2 mm pitch 

ribbon cable. The ribbon cable is included with the shipment of both Xilinx pro

gramming cables.

To install the FPGA Design Kit for the Model 52791’s Processing FPGA, copy the 

\Gate-

Flow

 folder on the DVD

ROM to the root directory of the C: drive of the system you’ll be 

working on. Unzip the archived project files.

The directory structure of the GateFlow DVD

ROMs mimics that of the development 

system upon which the original projects were created. We recommend that you copy 

the

 \GateFlow

 folder on each DVD

ROM to the root directory of the C: drive of the sys

tem you’ll be working on, such that the original, absolute pathnames of all files in the 

included project are maintained.

Full details for installing the FPGA Design Kit are provided in Chapter 1 of the Gate

Flow user manuals listed in Documentation Required for Installation. 

Summary of Contents for 52791

Page 1: ...2 Channel 500 MHz A D and Digital Downconverters Onyx Family VPX Board Setting the Standard for Digital Signal Processing Pentek Inc One Park Way Upper Saddle River NJ 07458 201 818 5900 www pentek co...

Page 2: ...Xpress Onyx and ReadyFlow are trademarks or registered trademarks of Pentek Inc Linux is a registered trademark of Linus B Torvalds Microsoft and Windows are trademarks or registered trademarks of Mic...

Page 3: ...requires two VPX slots one in which to install the Model 52791 assembly and a vacant slot to the right of it required to accommodate the JTAG board NOTE If your Model 52791 has Option 741 you must us...

Page 4: ...n and programming of the Pentek 71791 XMC module Before You Begin Consider the VPX Backplane The Pentek Model 5201 carrier is configured in accordance with the VITA 65 OpenVPX standard which defines V...

Page 5: ...d reloading the FPGA For example Switch SW1 2 allows you to change the maximum speed of the PLX PCIe switch from Gen 3 the factory default to Gen 2 NOTE The Model 71791 XMC module is shipped to boot w...

Page 6: ...amming for various workstation platforms Refer to the user s guide indicated for each platform Model 4994A ReadyFlow BSP for Linux Installation and Getting Started Guide Model 4995A ReadyFlow BSP for...

Page 7: ...Low Voltage Positive Emitter Coupled Logic LVPECL Sync Bus When the Model 71791 is a bus Master these pins output LVPECL Sync Bus signals to other slave units When the 71791 is a bus Slave these pins...

Page 8: ...The 5201 VPX carrier provides one 64 pin PMC connector designated J14 on the car rier PCB These pins are directly wired from PMC J14 to the VPX P2 connector for user I O NOTE The P14 signals can be c...

Page 9: ...ce The other three positions are empty The 71791 is shipped with the FPGA configuration SW SW1 2 set to ON which sets the board s maximum speed to Gen 3 x8 However the Model 5201 carrier limits the nu...

Page 10: ...n the Model 71791 Operating Manual and Model 52791 Installation Manual all others are reserved for factory test and setup purposes only Step 3 Installing the Hardware Model 52791 includes one Pentek 7...

Page 11: ...fic Pentek products on specific operating systems or platforms The installation procedure is different for each platform Linux The installation steps can be summarized as follows Installing ReadyFlow...

Page 12: ...e of the following two cables purchased from Xilinx Platform Cable USB DLC 9 Xilinx part HWUSB G Platform Cable USB II DLC10 Xilinx part HWUSB II G The Platform USB cable connects to a USB port on you...

Page 13: ...rring Configuration Data to the Model 71791 The GateFlow FPGA Design Kit includes test bench files and simulation projects that functionally simulate many operations of the Model 71791 XMC module when...

Page 14: ...e the Latest Information with YourPentek To receive automatic notification about updates to this product s documentation set up a YourPentek profile at http www pentek com go ypmanual YourPentek will...

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