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Page 6

Model 52791 Getting Started Guide

Rev. 1.0

Before You Begin: Jumper and Switch Settings (continued)

Pentek Model 5201 VPX Carrier Switches

Clock Driver Operation

: DIP switch 

SW1

 selects modes for the XMC interface clock 

drivers. 

SW1

 sets the following functions: clock power down, SRC stop, PLL bypass, 

and PLL bandwidth.

XMC Geographic Address

: DIP switch 

SW2

 selects the Geographic Address bits 

(GA0, GA1, GA2) for the XMC site interface.

To preview the DIP switch settings you’ll need to consider for the 5201 carrier PCB, 

refer to Section 2.7 of the 

Model 52791 Installation Manual

.

Before You Begin:

 Description of Software

Board Support Software for the Pentek Model 71791 XMC

Pentek’s ReadyFlow

®

 Board Support Packages (BSP)

 contain software support for the 

Model 71791 XMC module. This includes a device driver, plus the ReadyFlow Board 

Support Library data structures and routines. The following available BSPs allow 

high

level programming for various workstation platforms. Refer to the user’s guide 

indicated for each platform:

• Model 4994A ReadyFlow BSP for Linux

®

 Installation and Getting Started Guide

• Model 4995A ReadyFlow BSP for Windows

®

 Installation and Getting Started Guide

Pentek’s ReadyFlow

®

 Board Support Libraries

 contain a set of C

language data 

structures and routines for accessing the Model 71791 programmable resources. Refer 

to the 

ReadyFlow Programmer’s Reference 

for details.

Software for the FPGAs

The FPGA is supported with a Pentek GateFlow

®

 FPGA Design Kit. The GateFlow 

Design Kit (Model 4953) facilitates user

installed FPGA functions using the Xilinx ISE 

Design Suite. The FPGA Design Kit allows the user to modify, add to, or replace the 

default logic functions within the FPGA with functions of his or her own definition.

NOTE:

GateFlow is a very specialized software package intended for users with 
experience in FPGA logic programming. This package may not be required if 
the default functions included in the FPGA code, as written by Pentek, satisfy 
the requirements of your application.

Refer to the 

GateFlow User Manual

 for more information.

Summary of Contents for 52791

Page 1: ...2 Channel 500 MHz A D and Digital Downconverters Onyx Family VPX Board Setting the Standard for Digital Signal Processing Pentek Inc One Park Way Upper Saddle River NJ 07458 201 818 5900 www pentek co...

Page 2: ...Xpress Onyx and ReadyFlow are trademarks or registered trademarks of Pentek Inc Linux is a registered trademark of Linus B Torvalds Microsoft and Windows are trademarks or registered trademarks of Mic...

Page 3: ...requires two VPX slots one in which to install the Model 52791 assembly and a vacant slot to the right of it required to accommodate the JTAG board NOTE If your Model 52791 has Option 741 you must us...

Page 4: ...n and programming of the Pentek 71791 XMC module Before You Begin Consider the VPX Backplane The Pentek Model 5201 carrier is configured in accordance with the VITA 65 OpenVPX standard which defines V...

Page 5: ...d reloading the FPGA For example Switch SW1 2 allows you to change the maximum speed of the PLX PCIe switch from Gen 3 the factory default to Gen 2 NOTE The Model 71791 XMC module is shipped to boot w...

Page 6: ...amming for various workstation platforms Refer to the user s guide indicated for each platform Model 4994A ReadyFlow BSP for Linux Installation and Getting Started Guide Model 4995A ReadyFlow BSP for...

Page 7: ...Low Voltage Positive Emitter Coupled Logic LVPECL Sync Bus When the Model 71791 is a bus Master these pins output LVPECL Sync Bus signals to other slave units When the 71791 is a bus Slave these pins...

Page 8: ...The 5201 VPX carrier provides one 64 pin PMC connector designated J14 on the car rier PCB These pins are directly wired from PMC J14 to the VPX P2 connector for user I O NOTE The P14 signals can be c...

Page 9: ...ce The other three positions are empty The 71791 is shipped with the FPGA configuration SW SW1 2 set to ON which sets the board s maximum speed to Gen 3 x8 However the Model 5201 carrier limits the nu...

Page 10: ...n the Model 71791 Operating Manual and Model 52791 Installation Manual all others are reserved for factory test and setup purposes only Step 3 Installing the Hardware Model 52791 includes one Pentek 7...

Page 11: ...fic Pentek products on specific operating systems or platforms The installation procedure is different for each platform Linux The installation steps can be summarized as follows Installing ReadyFlow...

Page 12: ...e of the following two cables purchased from Xilinx Platform Cable USB DLC 9 Xilinx part HWUSB G Platform Cable USB II DLC10 Xilinx part HWUSB II G The Platform USB cable connects to a USB port on you...

Page 13: ...rring Configuration Data to the Model 71791 The GateFlow FPGA Design Kit includes test bench files and simulation projects that functionally simulate many operations of the Model 71791 XMC module when...

Page 14: ...e the Latest Information with YourPentek To receive automatic notification about updates to this product s documentation set up a YourPentek profile at http www pentek com go ypmanual YourPentek will...

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