15.21. JG-Board Block Diagram
X1500
Q1501
Q1500
X1501
Q1505
S1
G1
S2
G2
D2
D2
D1
D1
Q1511
S1
G1
S2
G2
D2
D2
D1
D1
Q1506
S1
G1
S2
G2
D2
D2
D1
D1
H264 DECODER
JG
TO
GS09
2
D-
D+
101
JG
19
4
(VSUS)5V
6
CARD_DET
102
3
+5V
DM1
DP1
USB RECEIVER
IC1504
81 XT1
83 XT2
13
VBBRST
INTA0
14
11
PCLK
VDD
AD0-AD31
+3.3V
SDDTC
PCCLK01
PCRST
PCIRQ1
PEAKS-PRO
IC1501
BOOT ROM
IC1502
IC1530
NAND FLASH
VCC
+3.3V
+3.3V
VCC
A0-A21
D0-D15
ED0-ED15
DATA BUS
WE,RE
CE,WP
CLE,ALE
I/O0-I/O7
ED0-ED7
EA1-EA22
ED0-ED15
CPU/A
CPU/D
XNFWE,XNFRE
XNFCE,XNFWP
NFCLE,NFALE
NAND
I/F
PCAD0
PCAD31
PCI BUS
512M DDR
IC1509,10
DDR2_0
DDR2_1
+1.8V
256M DDR
DDR2_4
DDR2_3
IC1511,12
+1.8V
C0DQ0-C0DQ31
C0A0-C0A12
C1A0-C1A12
C1DQ0-C1DQ31
NOT
USED
5
JG
04
3
14
1
SDLED
SDDAT3
SDWP
SDDAT0
SDDAT2
DLCTRL
SDDAT1
MAIN3.3V
SDCMD
SDCLK
9
11
10
8
12
13
+1.8V
SDDAT1
SDWP
SDDAT0
SDCLK
SDLED
SDDAT3
SDCMD
SDDAT2
IC1513
CLOCK GEN
1
4
S2
VIN
14
74M
X1
7
X2
16
13
VDD
VDD
15
+3.3V
33M 11
9
27M
CLKSEL
VC27A
CK74
CK27A
CK33IN
CK33XI
SD CARD
I/F
CLOCK
VDDR
+1.2V
VDD12
+1.8V
VDDIO
+3.3V
VDD33
AVDD
PCI BUS
VO1G0-VOG7
VO1B0-VOB7
MVY0-MVY7
MVC0-MVC7
VO1CLK
VO1VSYNC
VO1HYSNC
24
23
31
MHYSNC
MVSYNC
MVCLK
TxIN21
TxIN22
TxCLKN
15
11
7
TxIN9
TxIN12
TxIN15
TxIN20
22
TxIN18
19
56
TxIN0
TxIN4
56
3
TxIN6
TxIN7
4
6
TxIN8
IC1520
LVDS_TX
TxOUT0-
48
47
46
TxOUT1-
45
42
TxOUT2-
T
40
39
41
TxCLKOUT-
32
PWRDWN
LVDSENB
1
AO1DACCK
2
AO1BCK
BICK
MCLK
3
AO1DMIX
4
AO1LRCK
LRCK
SDTI
AUDIO D/A
IC1519
AUDIO
14
10
5
11
RSTN
AOUTR
AOUTL
VDD
AO1IEC
16
10
6
9
7
13
12
15
TO
DH8
JG
08
TA-
TA+
TB+
TB-
TC+
TC-
CLK+
CLK-
+5V
3
2
8
6
5
+8V
1
7
L
R
EQ
IC1518
XAVRST
SPDIFENB
1
2
4
5
VCC
BUFFER
IC1526
4
5
VIN
VO
IC1527
REG SUB+3.3V
VO
VIN
4
5
IC1525
REG +5V
5
7
9
1
2
SUB+9V
TO
H8
JG
10
SUB9V
SUB9V
H.264Audio_L
H.264Audio_R
SPDIF
FORMATEDGE
SDBOOT
XRST
POWER_DET
SBO2
SBO0
SBI0
SBI2
SCL0
SDA0
SDA
5
SCL
6
WC
EEPWP
7
IC1514
128k EEPROM
8
VCC
+3.3V
+3.3V
OUT-2
VO
16
23
LX
19
20 OUT-1
VCC
17
CTL
8
DC-DC +1.2V
IC1528
SUB+9V
SUB+9V
26 OUT1-1
SUB+9V
IC1521
LX1
DC-DC +3.3V/+1.8V
25
23 VCC
OUT1-2
24
3
VO1
12 VO2
20 OUT2-2
19 LX2
18 OUT2-1
SUB+9V
SUB+9V
+3.3V
+1.8V
CTL 16
JG9
2
3
5
7
6
TO
DG23
XRST
SDBOOT
POWER_DET
MAIN_ON
FORMAT_EDGE
Lite2_TX
Lite2_RX
8
9
2
SBI0
JG
11
1
5V
3
SBO0
FOR
FACTORY
USE
+5V
SERIAL
IIC BUS
VDD
+3.3V
TH-50PY700F/P, PZ700B/E
JG-Board Block Diagram
TH-50PY700F/P, PZ700B/E
JG-Board Block Diagram
TH-50PZ700B / TH-50PZ700E / TH-50PY700F / TH-50PY700P
95
Summary of Contents for Viera TH-50PZ700B
Page 5: ...1 Applicable signals 5 TH 50PZ700B TH 50PZ700E TH 50PY700F TH 50PY700P ...
Page 23: ...8 2 Lead of Wiring 2 23 TH 50PZ700B TH 50PZ700E TH 50PY700F TH 50PY700P ...
Page 24: ...8 3 Lead of Wiring 3 24 TH 50PZ700B TH 50PZ700E TH 50PY700F TH 50PY700P ...
Page 28: ...9 4 No Picture 28 TH 50PZ700B TH 50PZ700E TH 50PY700F TH 50PY700P ...
Page 40: ...40 TH 50PZ700B TH 50PZ700E TH 50PY700F TH 50PY700P ...
Page 158: ...16 2 Packing Exploded Views 1 158 TH 50PZ700B TH 50PZ700E TH 50PY700F TH 50PY700P ...
Page 159: ...16 3 Packing Exploded Views 2 159 TH 50PZ700B TH 50PZ700E TH 50PY700F TH 50PY700P ...
Page 160: ...16 4 Packing Exploded Views 3 160 TH 50PZ700B TH 50PZ700E TH 50PY700F TH 50PY700P ...
Page 161: ...16 5 Replacement Parts List Notes 161 TH 50PZ700B TH 50PZ700E TH 50PY700F TH 50PY700P ...