69
12.14. Timer (3/4) Section (Main P.C.B. (4/4)) Schematic Diagram (T)
100
R7515
100
R7517
TL7504
VWJ0795=5
K7510
0
K7509
100
R7528
100
R7542
100
R7565
CL7539
CL7541
CL7540
R7547
4.7K
Q7513
2SD0601A0L
22K
R7593
G_SBMTP_A
EPG_ON_H
G_SCLK_A
G_SBPTM_A
VWJ0795=5
K7505
XMPREQ
D3.3V
R7566 4.7K
R7579 22K
S
D
G
B1CFHC000003
Q7507
CL7510
CL7535
CL7534
G_IIC_DATA_A
XINTP
XINTM
G_IIC_CLK_A
4700
R7549
CL7516
CL7536
10P
C7532
10P
C7531
R7548
4700
VWJ0795=10
K7504
1
Q7512
2SD0601A0L
4.7K
R7546
R7545
22K
CL7538
CL7537
10P
C7533
C7535
10P
S
D
G
B1CFHC000003
Q7508
Q7506
2SD0601A0L
K7522
0
C7519
18P
CL7501
C7522
0
10K
R7534
56K
R7532
100
R7586
R7531
100K
0
R7533
100
R7536
100
R7537
100
R7535
C7528
1
C7523
1
CL7529
*
C7515
CL7530
R7669
4700
K7507
VWJ0795=5
CL7527
K7506
0
G_CSYNC_A
G_VSYNC_A
R7516
0
TL7515
TL7503
C7516
18P
CL7528
X7502
H0A327200170
C7518
22P
C7517
18P
H0D100500018
X7501
R7520
10K
TL7510
CL7525
C7547
1
R7576
1K
CL7533
CL7531
CL7532
10K
R7577
CL7503
100
R7575
C7554
0
TL7512
R7572
100
R7668
100
0.01
C7539
CL7515
R7601
1K
CL7526
CL7514
CL7512
CL7511
CL7513
CL7507
CL7506
3
4
2
5
98
94
95
92 91
93
97 96
1
100 99
80
78
76
77
79
87 86
88
89
82
84 83
81
85
90
16
14
15
17
11
13
12
69
67
65
64
66
68
70
51
49
45
47
46
41
44
42 43
48
50
30
39
37
35
32
31
34
33
36
38
40
22
23
20
21
26
28
27
24
25
18
19
53
55
57
62
60
59
61
63
58
56
54
29
52
75
73
71
72
74
9
7
6
8
10
IC7501
C2CBYY000697
100K
R7582
TU_P_ON_H
SYNC_DET
G_UARTP2M_A
G_SW_A
ANT_SHORT_L
XTMUTE
G_UARTM2P_A
AV4_S_IN_L
P_OFF_L
HDD_PFAIL
DR_P_ON_H
G_SW_A
TBUS_CLK
FAN_LOCK1
M
M
M
M
M
M
M
TBUS_TXD
HDMI3VONH
TBUS_RXD
M
M
M
TU
TU
AV
AV
M
HDD_PFAIL[L]
NCO(IIC DATA)FANPWM
NC_O(DIG S CS)DIG_CS
EPG_TRIG(NC_O)
AV
tu
M
AV
M
M
M
AV
M2P
tu
3R3
P2M
TOJIGU
AV
M
DI_P_ON[H]
TU_P_ON[H]
PRG(5V)
NC_O
NC_O
NC_O
SYNC_DET
AV4_SIN[L]
FL_CS[L]
[51]NC_O(FL_CLK)
[52]NC_O(FL_TXD)
NC_O
DR_P_ON[H]
32.768KHz_IN
VSYNC
FL_TXD(IR)
START(GND)
AV
GND
NSW5V
SYNCIN(VREF)
NC_GND
AVCC(5V)
AV
M1(GND)
FLASH_WRITE
CNVSS
[77]NC_O
P50_INT
NC_O
NC_O
NC_O
PFAIL[L]
SYS_P_FAIL[H](PW_GOOD_H)
FL_CLK(HSYNC)
[1]NC_O(OPEN)
32.768KHz_OUT
[3]REMOCON(GND)
[2]NC_I(GND)
NC_GND
NC_GND
AFC
AV2BLANKING
P50_OUT
KEYIN3
KEYIN1
KEYIN2
VDD2(5V)
3R3V_OFF_H(NC_O)
VSS2_GND(NC_O)
CVIN(GND)
AVSS(GND)
LP3(NC_O)
LP4(NC_O)
TEST1(NC_O)
[80]NC_GND
[79]IO_P_SAVE[H]
[78]CEC_OUT
AV2_PIN8
CEC_INT
125Hz
NC_O
XRESET
RESET
NC_O
PAL_BG_H
[30]IIC_DAT(ST_TX)
[32]PRG/EPG_RXD(IIC_CLK)
[33]PRG(GND)
[31]PRG/EPG_TXD(IIC_DAT)
AV3_SIN[L]
P_SAVE[H]
[29]IIC_CLK(ST_RX)
[53]NC(GND)
[54]HDMI5VONH
TEST2[H]
SYS2
XINTP _OUT
FAN_PWM_OUT(NC_O)
XINTM_OUT
NC_O(IIC CLK)NC_O
XTMUTE[L]
NC_O
VCC2(5V)
VSS(GND)
M306H7
10MHz_IN
NC_5V(DVBT_ANT_SHORT_L)
VCC1_3.3V(5V)
M16C30P
10MHz_OUT
[4]HSYNC(GND)
NC_O(DVBT_ANT_POW_H)
VSS(GND)
NC_O(SYNC_TEST)
XNMI(5V)
[28]125Hz(ST_CLK)
XINTM[TBUS]
XMPREQ[TBUS]
NC_O(FILAMENT_ON[L])
3R3V AREA
13
14
19
18
20
21
23
24
25
26
22
15
17
16
B
C
F
H
I
G
K
L
M
N
O
P
Q
R
T
S
U
V
Y
W
Timer (3/4) Section (Main P.C.B. (4/4))
Schematic Diagram (T)
DMR-EH59GA/GC/GN
NOTE:DO NOT USE THE PART NUMBER SHOWN ON THIS DRAWING FOR ORDERRING.
THE CORRECT PART NUMBER IS SHOWN IN THE PARTS LIST,AND MAY BE
SLIGHTLYDIFFERNT OR AMENDED SINCE THIS DRAWING WAS PREPARED.
8
9
10
7
6
E
F
G
D
C
5
4
3
2
1
B
A
TO
TIMER SECTION
(1/4)
TO
TIMER SECTION
(4/4)
LOCATION MAP
1/4
2/4
3/4
4/4
D
M:Main Net Section (Page: )
A
AV:AV I/O Section (Page: )
TU:Tuner Section (Page: )
B
C
T:Timer Section (Page: )
D
Summary of Contents for DMR-EH59GC
Page 5: ...5 1 2 Caution for AC Cord For EH59GC only ...
Page 14: ...14 ...
Page 18: ...18 NOTE Use the replacement parts RMV0335 when the Sheet has not being stickability ...
Page 35: ...35 9 2 P C B Positions ...
Page 42: ...42 10 1 2 Checking and Repairing of RAM Digital P C B Module ...
Page 43: ...43 10 1 3 Checking and Repairing of Main P C B ...
Page 44: ...44 10 1 4 Checking and Repairing of HDD ...
Page 90: ...90 14 1 6 Waveform Chart ...