Owon Dual-Channel Series, User Manual

Page: 153 / 157

11.Technical Specifications
146
Windows Time 30 ns to 10 s
For XDS3102AP/XDS3202A, the range is
8 bits mode 2 ns to 10 s
12 bits mode 4 ns to 10 s
14 bits mode 20 ns to 10 s
Timeout Trigger
Edge Type Rising, Falling
Idle Time
30 ns to 10 s
For XDS3102AP/XDS3202A, the range is
8 bits mode 2 ns to 10 s
12 bits mode 4 ns to 10 s
14 bits mode 20 ns to 10 s
Nth Edge Trigger
Edge Type Rising, Falling
Idle Time 30 ns to 10 s
Edge Number 1 to 128
Logic Trigger
Logic Mode AND, OR, XNOR, XOR
Input Mode H, L, X, Rising, Falling
Output Mode
Goes True, Goes False, Is True >,
Is True <, Is True =
RS232 Trigger
Polarity Normal, Inverted
Trigger Condition Start, Error, Check Error, Data
Baud Rate Common, Custom
Data Bits 5 bit, 6 bit, 7 bit, 8 bit
I2C Trigger
Trigger Condition
Start, Restart, Stop, ACK Lost, Address,
Data, Addr/Data
Address Bits 7 bit, 8 bit, 10 bit
Address Range 0 to 127, 0 to 255, 0 to 1023
Byte Length 1 to 5
SPI Trigger
Trigger Condition Timeout
Timeout Value 30 ns to 10 s
Data Bits 4 bit to 32 bit
Data Line Setting H, L, X
CAN Trigger
(optional)
Signal Type CAN_H, CAN_L, TX, RX
Trigger Condition
Start of Frame, Type of Frame, Identifier,
Data, ID & Data, End of Frame, Missing
Ack, Bit Stuffing Error
Baud Rate Common, Custom
Sample Point 5% to 95%
Frame Type Data, Remote, Error, Overload
Waveform Generator
(Optional)
Performance
Characteristics
Instruction
Max Frequency Output 25 MHz
Sample rate 125 MSa/s