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IC BLOCK DIAGRAM/ TERMINAL DESCRIPTION
Pin Layout
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
33
32
31
30
29
28
27
26
25
24
23
44
43
42
41
40
39
38
37
36
35
34
AK4586VQ
Top View
XTO
XTI/EXTCLK
DVDD
DVSS
TVDD
TX
MCKO
LRCK
BICK
SDTO
SDTI1
SDTI2
SDTI3
INT0
INT1
CAD1/CDTO
SDA/CDT1
SCL/CCLK
CAD0/CSN
DZF2/OVF
AVSS
AVDD
RIN
LIN
ROUT1
LOUT1
ROUT2
LOUT2
ROUT3
LOUT3
DZF1
VCOM
VREFH
PDN
RX1
I2C
RX2
TST
RX3
SLAVE
RX4
PVSS
R
PVDD
Audio
I/F
LPF
LPF
DAC
DATT
LPF
DAC
DATT
LPF
DAC
DATT
LPF
DAC
DATT
LPF
DAC
DATT
LOUT1
ROUT1
LOUT2
ROUT2
LOUT3
ROUT3
DAC
DATT
AK4586VQ
ADC
HPF
ADC
HPF
RIN
LIN
SDTI1
SDTI2
SDTI3
MCLK
SDOUT
SDIN1
SDIN2
SDIN3
BICK
LRCK
Input
Selector
Clock
Generator
X'tal
Oscillator
uP I/F
Clock
Recovery
DEM
SDTO
XTI
XTO
MCKO
TX
RX1
RX2
RX3
RX4
CSN
CCLK
CDTI
CDTO
DAIF
Decoder
No. Name
I/O
1
XTO
O
Crystal oscillator output pin
XTI
I
Crystal oscillator input pin
EXTCLK
I
Master clock input pin
3
TVDD
-
Power supply pin for output buffer. 2.7V to 5.5V
4
DVSS
-
Digital ground pin
5
DVDD
-
Power supply pin for digital section. 4.5V to 5.5V
6
TX
O
Transmitter channel output pin
7
MCKO
O
Master clock output pin
8
LRCK
I/O
Input/Output channel clock pin
9
BICK
I/O
Audio serial data clock pin
10
SDTO
O
Audio serial data output pin
11
SDTI1
I
Audio serial data input pin for DAC1
12
SDTI2
I
Audio serial data input pin for DAC2
13
SDTI3
I
Audio serial data input pin for DAC3
14
INT0
O
Interrupter pin 0
15
INT1
O
Interrupter pin 1
CDTO
O
Control data output pin (Serial mode)
CADI
I
Chip address pin 1 (Bus mode)
CDTI
I
Control data input pin (Serial mode)
SDA
I/O
Control data input/output pin (Bus mode)
CCLK
I
Control data clock pin (Serial mode)
SCL
I
Control data clock pin (Bus mode)
CSN
I
Chip select pin (Serial mode)
CAD0
I
Chip address pin 0 (Bus mode)
DZF2
O
Zero input detection pin 2
OVF
O
Overflow detection pin for analog input
21
AVSS
-
Analog ground pin
22
AVDD
-
Power supply pin for analog section. 4.5V to 5.5V
23
VREFH
I
Reference voltage input pin, AVDD
24
VCOM
O
Common voltage output pin, AVDD/2
25
DZF1
O
Zero input detection pin 1
26
LOUT3
O
DAC 3 left channel analog output pin
27
ROUT3
O
DAC 3 right channel analog output pin
28
LOUT2
O
DAC 2 left channel analog output pin
29
ROUT2
O
DAC 2 right channel analog output pin
30
LOUT1
O
DAC 1 left channel analog output pin
31
ROUT1
O
DAC 1 right channel analog output pin
32
LIN
I
Left channel analog input pin
33
RIN
I
Right channel analog input pin
34
PVDD
-
PLL power supply pin. 4.5V to 5.5V
35
R
-
External resistor connection pin
36
PVSS
-
PLL ground pin
37
RX4
I
Receiver channel input pin 4
38
SLAVE
I
Slave mode pin
39
RX3
I
Receiver channel input pin 3
40
TST
I
Test pin
41
RX2
I
Receiver channel input pin 2
42
I2C
I
Serial control mode select pin. Serial at H.
43
RX1
I
Receiver channel input pin 1
44
PDN
I
Power down and reset pin
19
20
2
16
17
18
Block diagram
Q8401: AK4586VQ (96kHz 6ch CODEC)
32
33
30
31
29
28
26
27
2
1
7
6
43
41
39
37
10
9
8
11
12
13
19
18
17
16
Terminal description
Description
Block diagram