NCP1219PRINTGEVB
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13
This effect is called “Over power” because it increases the
power at which the overcurrent protection disables the
controller. Specifically, for a DCM flyback system, the total
power delivered to the output including the propagation
delay effect is:
P
out
+
1
2
@
L
P
@
ǒ
I
peak
)
V
bulk
L
p
@
t
delay
Ǔ
2
@
f
SW
@
h
(eq. 34)
The NCP1219 is designed with a very short t
delay
(59 ns
typical). This minimizes the overpower. If a tighter
overpower limit is required, then overpower compensation
is implemented by using the circuits shown in Figures 23
and 24.
Figure 23. Overpower Compensation Circuit Using
the Bulk Capacitor Voltage
R
comp
V
bulk
R
OPP
R
sense
Skip/
latch
FB
CS
DRV
GND
VCC
HV
Figure 24. Overpower Compensation Circuit Using a
Forward Auxiliary Winding
Aux
R
comp
R
OPP
R
sense
Skip/
latch
FB
CS
DRV
GND
VCC
HV
Pri
The circuit in Figure 23 modifies the I
peak
setpoint
proportional to the HV bulk level. The voltage divider
formed by R
OPP
and R
comp
creates an offset that
compensates for the propagation delay, but increases power
dissipation. Figure 24 provides another option that results in
reduced power dissipation. By altering the connection of the
auxiliary winding diode, a new setpoint is created whose
voltage is proportional to V
in
. The power dissipation is
reduced by a factor of (N
pri
:N
aux
)
2
.
To determine the required amount of compensation, first
the peak current for the overcurrent power at high line is
calculated using Equation 35.
I
peak
+
2
@
P
out
L
p
@
f
OSC
@
h
Ǹ
(eq. 35)
Using the measured output power at high line, the
calculated peak current of 2.63 A causes a voltage on the
sense resistor, as in Equation 36.
V
sense(peak)
+
I
peak
@
R
sense
(eq. 36)
The resulting sense voltage is 1.13 V. Under high line
conditions, the desired overpower output current is 2.5 A
(60 W). Calculate the sense voltage associated with the
desired output power using the same method. In this case, an
output power of 60 W results in a sense voltage of 1.06 V.
The difference between the calculated sense voltages is
given by Equation 37.
V
CS(offset)
+
V
sense(peak1)
*
V
sense(peak2)
(eq. 37)
For this design V
CS(offset)
is 70 mV. This represents the
offset voltage required on the CS pin to force the controller
to enter overcurrent protection at the desired output power.
If the circuit in Figure 23 is chosen, the R
OPP
resistor is
selected to ensure the power dissipation of the circuit does
not exceed the desired maximum, P
OPP
. For this design
50 mW is selected. The resistor value is calculated using
Equation 38.
R
OPP
+
V
bulk(max)
2
P
OPP
(eq. 38)
R
OPP
creates a current that flows through R
comp
, creating
the necessary offset (V
CS(offset)
) on the CS pin to
compensate for the propagation delay. The current is
calculated with Equation 39.
I
OPP
+
V
bulk(max)
*
1 V
V
CS(offset)
(eq. 39)
The ramp compensation resistor also creates an offset
voltage due to the ramp compensation current supplied by
the controller. The internal current ramp has a slope of
8.12
m
A/
m
s. The controller on time is measured near the
current limit in order to determine the peak voltage on the
ramp compensation resistor. The total effect of the added
compensation is shown in Equation 40.
R
ramp
+
V
CS(offset)
8.12 A
ń
s
@
t
on
)
V
bulk(max)
*
1
R
OPP
(eq. 40)
R
OPP
is chosen to be 2.8 M
W
. R
ramp
is chosen to be 412
W
to achieve an overcurrent limit at 60 W under high line
conditions. The low line overcurrent limit must also be
confirmed to ensure that the peak power is delivered with the
overpower compensation circuit. The low line current limit
for this design is measured to be 2.2 A (52.8 W).
