KAC−12040
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22
8 BANK LVDS DATA READOUT
LVDS Banks
The KAC−12040 provides 8 parallel pixel banks, each
consisting of 8 LVDS differential pairs (7 data pairs + 1clock
pair). This allows the output of 8 pixels per LVDS clock
period. All 7 data pairs, of each bank, are used only in 14 bit
operation mode. By default only 5 data pairs are used for
10 bit mode (D4
→
D0). The unused pairs are held in
low-power high impedance mode.
Figure 19. LVDS Bank Labeling
Pixel Array
2 Bank Mode
Bank 3
Bank 5
Bank 7
Bank 2
Bank 4
Bank 6
Bank 0
Bank 1
Pixel Array
4 Bank Mode
Bank 3
Bank 5
Bank 7
Bank 2
Bank 4
Bank 6
Bank 0
Bank 1
Pixel Array
8 Bank Mode
Bank 3
Bank 5
Bank 7
Bank 2
Bank 4
Bank 6
Bank 0
Bank 1
The number of output banks used is independent of the
ADC bit depth chosen. By default the KAC−12040 uses all
8 output banks for maximum frame rate. If technical
restrictions prevent the use of 8 LVDS banks, the sensor can
be programmed to use 4 or 2 banks, however this can result
in reduced frame rate and reduction of image quality. It is
recommended that 8 banks be used when possible. Only the
8 bank option is discussed in detail in this specification, see
the KAC−12040 User Guide for additional detail on 4 and 2
bank mode.
In order to minimize the LVDS clock rate (and power) for
a given data rate the pixels are output in DDR (Double Data
Rate) where the MSB is always sent first (on rising edge) and
the LSB second (falling edge) This is not programmable.
Ports per LVDS Bank
The MSB comes out first on the falling edge, followed by
the LSB on the net rising edge.
Table 13. NUMBER OF LVDS PAIRS (PORTS) USED VS. BIT DEPTH
Bit Depth
Edge of DATA CLK
Data0
Data1
Data2
Data3
Data4
Data5
Data6
14 bits
Falling (MSB Nibble)
D7
D8
D9
D10
D11
D12
D13
Rising (LSB Nibble)
D0
D1
D2
D3
D4
D5
D6
12 bits
Falling (MSB Nibble)
D6
D7
D8
D9
D10
D11
HiZ
Rising (LSB Nibble)
D0
D1
D2
D3
D4
D5
HiZ
10 bits
Falling (MSB Nibble)
D5
D6
D7
D8
D9
HiZ
HiZ
Rising (LSB Nibble)
D0
D1
D2
D3
D4
HiZ
HiZ
8 bits
Falling (MSB Nibble)
D4
D5
D6
D7
HiZ
HiZ
HiZ
Rising (LSB Nibble)
D0
D1
D2
D3
HiZ
HiZ
HiZ