ON Semiconductor EZAIRO 7160 SL, Manual

Page: 4 / 17

EZAIRO 7160 SL HYBRID
www.onsemi.com
4
Table 2. ELECTRICAL SPECIFICATIONS
Description Screened Units Max Typ Min Conditions Symbol
VREG
Regulated voltage output VREG I
load
= 100 m A 0.96 0.97 0.98 V n
Regulator PSRR VREG
PSRR
1 kHz, VBAT = 1.25 V 76 80 − dB
Load current I
LOAD
− − 2 mA
Load regulation LOAD
REG
5 m A < Iload < 2 mA − 4 10 mV/mA
Line regulation LINE
REG
Iload = 1 mA − 2 5 mV/V
VDDA
Output voltage trimming
range
VDDA Control register configured,
typical values
1.8 2.0 2.1 V
n
Regulator PSRR VDDA
PSRR
1 kHz, VBAT = 1.25 V 40 50 − dB
Load current I
LOAD
− − 1 mA
Load regulation LOAD
REG
VBAT = 1.2 V; 100 m A <
Iload < 1 mA
− 4 10 mV/mA
Line regulation LINE
REG
1.2 V < VBAT < 1.86 V;
Iload = 100 m A
− 6 20 mV/V
VDBL
Output voltage trimming
range
VDBL Control register configured,
typical values, unloaded
1.6 2.0 2.2 V n
Regulator PSRR VDBL
PSRR
1 kHz, VBAT=1.25 V 30 40 − dB
Load current I
LOAD
ITRIM (A_CP_VDBL_CTRL)
= 0x7
− − 15 mA
Load regulation LOAD
REG
VBAT = 1.2 V; 100 m A <
Iload < 3 mA
− 4 10 mV/mA
Line regulation LINE
REG
VBAT > 1.2 V; Iload = 100 m A
− 6 20 mV/V
VDDC
Digital supply output volt-
age trimming range
VDDC Control register configured,
typical values, unloaded
0.72 −
(Note 5)
1.32 V n
VDDC output level adjust-
ment
VDDC
STEP
1.5 2.5 3 mV n
Regulator PSRR VDDC
PSRR
1 kHz, VBAT = 1.25 V 25 30 − dB
Load current I
LOAD
Delivered by LDO − − 5 mA
Load regulation LOAD
REG
− 5 10 mV/mA
Line regulation LINE
REG
− 6 12 mV/V
VDDM
Memory supply output volt-
age trimming range
VDDM Control register configured,
typical values, unloaded
0.82 −
(Note 6)
1.32 V
n
VDDM output level adjust-
ment
VDDM
STEP
1.5 2.5 3 mV
n
Regulator PSRR VDDM
PSRR
1 kHz, VBAT = 1.25 V 25 30 − dB
Load current I
LOAD
Delivered by LDO − − 5 mA
Load regulation LOAD
REG
− 5 10 mV/mA
Line regulation LINE
REG
− 6 12 mV/V
POWER − ON − RESET (triggered from the RSL10 value)
POR voltage VBAT
POR
− − 1.0 V
INPUT STAGE
Analog input voltage range V
IN
0 − 2 V
Preamplifier gain PAG 3 dB steps 0 − 36 dB n
Preamplifier gain accuracy PAG acc 1 kHz, PAG from 0 to 36 dB − 1.5 0 1.5 dB n