Omron CQM1-ARM21, Operation Manual

Page: 35 / 86

Performance
Section 3-3
21
3-3-3 I/O Response Time
The fieldbus cycle is not synchronised with the PLC cycle; fieldbus cycles are
executed continuously, independent of the PLC cycle.
Minimum I/O response time
The figure below illustrates the minimum I/O response time. Shown are the
timing at the PLC CPU, the AS-Interface bus, the Master Unit, the slave input
and the slave output.
t
PLC
CPU t
RF
t
PE
t
RF
Master t
MP1
t
MP2
Bus t
BC1
t
BC2
Input
t
IN
Output t
OUT
t
RESPONSE
t
IN
: Input Slave’s ON (OFF) delay.
Physical signal change at the terminals
→
data available for trans-
mission.
t
BC1
: Bus cycle delay. Minimal if the slave input data changed just before
being seviced.
t
MP1
: Master processing time.
Start receiving slave response
→
data available at the I/O bus.
t
RF
: I/O refresh time.
Time required to update inputs and outputs of all CQM1 I/O units.
t
PE
: Program Execution time
Processing of the PLC program and peripherals
t
PLC
: PLC Cycle time (scan time) = t
PE
+ t
RF
t
MP2
: Master processing time.
Data available at the I/O bus interface
→
ODI updated.
t
BC1
: Bus cycle delay. Minimal if the ODI was updated just before the
master sevices the output slave.
t
OUT
: Output Slave’s ON (OFF) delay.
Data received from master
→
physical signal change at the termi-
nals.
t
RESPONSE
= t
IN
+ 2* (t
BCx
+ t
MPx
)+ t
PLC
+ t
OUT
in which t
IN
and t
OUT
are slave dependent, and t
PLC
can be determined
using a programming console or by monitoring AR27 in the CPU.
The minimum value of (t
BCx
+ t
MPx
) is approximately the time required
for one data exchange, i.e. 154
µ
s.