Omnivision CameraChip OV9650 Implementation Manual Download Page 43

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SCCB Interface

Version 1.1, December 7, 2004

Proprietary to OmniVision Technologies

mni

ision

RAVE

V/R Average Level
Automatically updated based on chip output format

COM2

Common Control 2

Bit[7:5]: Reserved
Bit[4]:

Soft sleep mode

Bit[3:2]: Reserved
Bit[1:0]: Output drive capability

00: 1x
01: 2x
10: 3x
11: 4x

PID

Product ID Number MSB (Read only)

VER

Product ID Number LSB (Read only)

COM3

Common Control 3

Bit[7]:

Reserved

Bit[6]:

Output data MSB and LSB swap

Bit[5:4]: Reserved
Bit[3]:

Pin selection
1:

Change RESET pin to EXPST_B (frame exposure

mode timing) and change PWDN pin to FREX (frame

exposure enable)

Bit[2]:

VarioPixel for VGA, CIF, QVGA, QCIF, QQVGA, and QQCIF

Bit[1]:

Reserved

Bit[0]:

Single frame output (used for Frame Exposure mode only)

COM4

Common Control 4

Bit[7]:

VarioPixel for QVGA, QCIF, QQVGA, and QQCIF

Bit[6:3]: Reserved
Bit[2]:

Tri-state option for output clock at power-down period
0:

Tri-state at this period

No tri-state at this period

Bit[1]:

Tri-state option for output data at power-down period
0:

Tri-state at this period

No tri-state at this period

Bit[0]:

Reserved

COM5

Common Control 5

Bit[7]:

System clock selection. If the system clock is 48 MHz, this

bit should be set to high to get 15 fps for YUV or RGB

Bit[6:5]: Reserved
Bit[4]:

Slam mode enable
0:

Master mode

Slam mode (used for slave mode)

Bit[3:0]: Reserved

Table 10-2. Device Control Register List (Continued)

Address

(Hex)

Register

Name

Default

(Hex)

R/W

Description

Summary of Contents for CameraChip OV9650

Page 1: ...l property rights is granted herein Third party brands names and trademarks are the property of their respective owners Note The information contained in this document is considered proprietary to OmniVision Technologies Inc This information may be distributed only to individuals or organizations authorized by OmniVision Technologies Inc to receive said information Individuals and or organizations...

Page 2: ... Adjustment Output Formatter 12 3 3 3 Dummy Line Adjustment 12 3 4 Exposure Control 12 3 4 1 Digital Exposure Control 12 3 5 Strobe Flash Control 19 3 6 RGB Raw Data Output Sequence 20 Section 4 Analog Processing Block 20 4 1 Gain Control 20 4 1 1 Manual Gain Control 20 4 1 2 Automatic Gain Control AGC 22 4 2 White Balance Control 23 4 2 1 Automatic White Balance Control 24 4 2 2 Manual White Bala...

Page 3: ...ection 8 Special Image Effects 38 Section 9 Preview Mode to Still Image Capture Sequence 39 9 1 Exposure Time and Gain Calculation 40 Section 10 SCCB Interface 40 10 1 Control Functions 40 10 1 1 Register Reset 41 10 1 2 Standby Mode Enable 41 10 1 3 Tri state Enable 41 10 2 Register Set 42 Section 11 Prototyping and Evaluation Modules 53 11 1 OV9650EAA Prototyping Module 53 11 2 OV9650ECX USB 2 0...

Page 4: ...ck Diagram 6 Figure 3 1 Manual Exposure Frame Drop Timing Diagram 13 Figure 3 2 Desired Convergence 17 Figure 3 3 SXGA Strobe Flash Timing Diagram 19 Figure 3 4 VGA Strobe Flash Timing Diagram 19 Figure 3 5 QVGA Strobe Flash Timing Diagram 19 Figure 5 1 Gamma Curve 25 Figure 5 2 Lens Shading Correction 31 Figure 6 1 Example of Windowing 34 Figure 6 2 MSB LSB Output Data Swap 37 ...

Page 5: ...rols 22 Table 4 3 AGC Enable Bit 22 Table 4 4 AGC Convergence Limits 23 Table 4 5 AWB Red Blue Balance Control 24 Table 5 1 Related Registers and Parameters 25 Table 5 2 Color Matrix Related Registers and Parameters 27 Table 5 3 Color Matrix Related Registers and Parameters 30 Table 5 4 Lens Shading Correction Registers and Parameters 32 Table 6 1 Output Formatting General Controls 33 Table 6 2 RG...

Page 6: ...sheet with considerations for PCB layout register configurations and timing parameters for rapid product design and deployment 1 1 Function Description Figure 1 1 shows the functional block diagram of the OV9650 image sensor The OV9650 includes Image Sensor Array 1300 x 1028 resolution Timing Generator Analog Processing Block Digital Signal Processor DSP Output Formatter Digital Video Port SCCB In...

Page 7: ...or GR color from the light striking the cell directly as well as from the light striking the surrounding cells The Raw RGB image does not have any image processing Table 2 1 lists all OV9650 output formats Table 2 1 OV9650 Output Formats Device Format Output Register OV9650 YUV YCbCr 8 bits 4 2 2 Interpolated color COM7 2 0 0x12 GRB 8 bits 4 2 2 Interpolated color COM7 2 1 0x12 COM7 0 0 COM15 4 0 ...

Page 8: ... settings Sensor power on default values are not the best settings for image quality Table 2 2 Resolution Register Settings Sheet 1 of 2 Resolution Register Address Value Description 12 MHz Input Clock 4X PLL SXGA COM1 0x04 0x00 15 fps SXGA YUV mode COM3 0x0C 0x00 COM4 0x0D 0x00 CLKRC 0x11 0x80 COM7 0x12 0x00 ADC 0x37 0x81 ACOM 0x38 0x93 OFON 0x39 0x50 VGA COM1 0x04 0x00 30 fps VGA YUV mode COM3 0...

Page 9: ...M4 0x0D 0x80 CLKRC 0x11 0x83 COM7 0x12 0x20 ADC 0x37 0x91 ACOM 0x38 0x12 OFON 0x39 0x43 QCIF COM1 0x04 0x00 30 fps QCIF YUV mode COM3 0x0C 0x04 COM4 0x0D 0x80 CLKRC 0x11 0x87 COM7 0x12 0x08 ADC 0x37 0x91 ACOM 0x38 0x12 OFON 0x39 0x43 QQCIF COM1 0x04 0x24 30 fps QQCIF YUV mode COM3 0x0C 0x04 COM4 0x0D 0x80 CLKRC 0x11 0x87 COM7 0x12 0x08 ADC 0x37 0x91 ACOM 0x38 0x12 OFON 0x39 0x43 Table 2 2 Resoluti...

Page 10: ... image resolution and reduce noise level Down scaling technology down scales the output size VGA QVGA QQVGA CIF QCIF and QQCIF have the same view angle which cuts 6 25 of the vertical view and keeps the same horizontal view of SXGA 3 2 Sync Signal Selection The OV9650 CAMERACHIP supplies two output sync signals VSYNC and HREF The vertical sync VSYNC signal is output on pin D2 The horizontal refere...

Page 11: ...y 1 2 3 4 64 The internal clock frequency fINT CLK can be expressed as follows fINT CLK fCLK CLKRC 7 1 2 CLKRC 5 0 1 tINT CLK tCLK CLKRC 5 0 1 CLKRC 7 1 2 Table 3 1 shows the maximum frame rate and pixel clock PCLK for the given input clock rate XCLK1 RGB raw pixel clock rate is half of YUV mode for the same frame rate and resolution Table 3 1 Frame Rate Pixel Clock Rate and Input Clock Rate CLKRC...

Page 12: ...EC 15 0 MSB LSB AECHM 5 0 0xA1 AECH 7 0 0x10 COM1 1 0 0x04 Each bit in AEC 15 0 tROW interval 2 1520 tINT CLK Note that both the AEC and AGC functions are interactive so registers and functions may be common to both Also in general the AEC is the primary control and will be adjusted before the AGC the AGC acts to adjust and center the AEC The algorithm used for the electronic exposure control is b...

Page 13: ... Diagram Rolling Horizontal Band Elimination in Manual Mode The OV9650 supports a rolling shutter exposure mode and requires special exposure values when used in 50 60 Hz lighting conditions to eliminate rolling horizontal band flicker The minimum exposure value is 1 120 second for 60 Hz and 1 100 second for 50 Hz lighting conditions The following steps outline how to calculate the proper exposure...

Page 14: ...x2F COM1 1 0 0x04 0x02 QQCIF 190 lines Register setting AECHM 5 0 0xA1 0x00 AECH 7 0 0x10 0x2F COM1 1 0 0x04 0x02 3 4 1 2 Automatic Exposure Control Mode AEC The AEC function allows for the CAMERACHIP to adjust the exposure without external command or control The registers AECHM 5 0 0xA1 AECH 7 0 0x10 and COM1 1 0 0x04 are adjusted by the CAMERACHIP internal controls and cannot be overwritten by a...

Page 15: ... and 60 Hz lighting frequency If the light is too strong the minimum exposure time equal to Banding Filter Value to eliminate the banding may result in an over exposed image To avoid over exposure OV9650 has an option to allow the real exposure time to be less than the Banding Filter Value by setting register COM9 3 0x14 Banding Filter Value Calculation The Banding Filter Value depends on the ligh...

Page 16: ... exposure to maintain the specified range A value of 0 in register COM8 7 0x13 will result in normal speed operation and a 1 will result in fast speed operation In fast mode register VPT 0x26 sets the AEC control zone and register COM8 6 0x13 sets the step size When COM8 6 1 the exposure time will decrease by half if the target image YAVG is greater than VPT 7 4 0x26 16 and the exposure time will ...

Page 17: ...5 0 16 Exposure time decrease AEC 15 0 16 Once the current value is inside the stable operating region the AEC AGC value has converged Figure 3 2 Desired Convergence Control Zone Upper Limit VPT 7 4 0x26 MSB 4 b0000 LSB Control Zone Lower Limit VPT 3 0 0x26 MSB 4 b0000 LSB Stable Operating Region Upper Limit AEW 7 0 0x24 Stable Operating Region Lower Limit AEB 7 0 0x25 Table 3 3 AEC Convergence Li...

Page 18: ...Center half 10 Center quarter 11 Not allowed Banding Filter Enable COM8 5 0x13 Banding filter enable 1 Manual Banding Filter Enable COM11 0 0x3B High enable Manual Banding Filter Value MBD 7 0 0x6A Minimum banding filter exposure time Auto Banding Filter Enable COM11 0 0x3B COM11 0 0 Auto Banding Filter Value BD50ST 7 0 BD60ST 7 0 0xA2 0xA3 Minimum banding filter exposure time Auto Banding Filter ...

Page 19: ...be Flash Timing Diagram VSYNC Line Output 1 2 0 0 1 2 0 Line Reset 0 1 2 1023 1024 1023 1024 0 0 1 2 Note If using live video mode for still capture and if flash is required use maximum exposure 1 frame and turn on flash only between this gray period Exposure Time 1 Tframe 12 x Tline 4 x Tline 9 x Tline 1023 1023 1024 VSYNC Line Output 1 2 479 480 0 0 1 2 479 0 Line Reset 0 1 2 479 480 0 0 1 2 479...

Page 20: ...is low the data is not valid HREF polarity can also be changed by setting register COM10 3 0x15 When using the HSYNC signal adjust registers EXHCH 0x2A HSYST 0x30 and HSYEN 0x31 to adjust the HSYNC signal rising and falling edges to obtain valid data To obtain the HSYNC and HREF width set registers HSTART 0x17 and HSTOP 0x18 or EXHCH 0x2A HSYST 0x30 and HSYEN 0x31 respectively 4 Analog Processing ...

Page 21: ... 0x00 Gain dB 00 00000000 1 0 00 00000001 1 1 16 375 00 00000010 1 2 16 75 00 00000011 1 3 16 1 125 00 00000100 1 4 16 1 5 00 00000101 1 5 16 1 875 00 00000110 1 6 16 2 25 00 00000111 1 7 16 2 625 00 00001000 1 8 16 3 00 00001001 1 9 16 3 375 00 00001010 1 10 16 3 75 00 00001011 1 11 16 4 125 00 00001100 1 12 16 4 5 00 00001101 1 13 16 4 875 00 00001110 1 14 16 5 25 00 00001111 1 15 16 5 625 00 00...

Page 22: ...set the conditions for fast AGC Table 4 2 shows the general controls for the AGC The analog pixel data first arrives at the AGC amplifier which can be automatically controlled by the AGC circuit or manually programmed by the user see Table 4 3 In both cases the gain control is active but when AGC is disabled the gain setting is generated by the user and not updated by the AGC circuit Table 4 2 AGC...

Page 23: ...is white balance is either automatically controlled by the AWB circuit or manually controlled by the user The following describes these AWB modes Full user control RED BLUE channels are set manually Normal AWB control RED BLUE channels are under AWB control based on R G B average values Advanced AWB control RED BLUE channels are under AWB control based on color temperature Register COM8 1 0x13 ena...

Page 24: ...de the companion backend processor can control OV9650 internal Red and Blue register values to achieve white balance These registers are BLUE 0x01 and RED 0x02 and are defined as follows Blue Gain BLUE 7 0 0x01 Red Gain RED 7 0 0x02 Gain 40 7 80 6 47 5 25 4 13 3 7 2 4 1 2 0 1 120 Blue and Red pre gain are controlled by register HV 7 6 0x69 and HV 5 4 respectively The pre gain is defined below Blue...

Page 25: ...near lines as shown in Figure 5 1 and Table 5 1 Figure 5 1 Gamma Curve Table 5 1 Related Registers and Parameters Sheet 1 of 2 Gamma Start Point Gamma Slope Horizontal Reference Name Register Name Register Name Value GSP1 0x6C XREF1 4 GST1 0x7C GSP2 0x6D XREF2 8 GST2 0x7D GSP3 0x6E XREF3 16 GST3 0x7E GSP4 0x6F XREF4 32 GST4 0x7F GSP5 0x70 XREF5 40 GST5 0x80 GSP6 0x71 XREF6 48 GST6 0x81 GSP7 0x72 X...

Page 26: ...10 0x75 XREF10 80 GST10 0x85 GSP11 0x76 XREF11 96 GST11 0x86 GSP12 0x77 XREF12 112 GST12 0x87 GSP13 0x78 XREF13 144 GST13 0x88 GSP14 0x79 XREF14 176 GST14 0x89 GSP15 0x7A XREF15 208 GST15 0x8A GSP16 0x7B Note GST 0 0 GST 16 255 XREF 0 0 XREF 16 255 Note Gamma Start Point and Slope should be matched otherwise there will be discontinuous points in the Gamma curve Table 5 1 Related Registers and Para...

Page 27: ...rix performs the color correction and the RGB to YUV YCbCr conversion Also because of the Matrix linear algebra characteristic it can also do color gain and hue control as shown below YUV Gain Matrix Hue Matrix RGB to YUV YCbCr Matrix Color correction RGB YUV Combined Matrix RGB Table 5 2 Color Matrix Related Registers and Parameters Name Register Address MTX1 MTX1 0x4F MTX2 MTX2 0x50 MTX3 MTX3 0x...

Page 28: ...0x58 sign bit of the MTX3 MTXS 2 0x58 sign bit of the MTX4 MTXS 3 0x58 sign bit of the MTX5 MTXS 4 0x58 sign bit of the MTX6 MTXS 5 0x58 sign bit of the MTX7 MTXS 6 0x58 sign bit of the MTX8 MTXS 7 0x58 sign bit of the MTX9 5 2 1 1 Color Correction Matrix Below is the OV9650 color correction matrix 5 2 1 2 RGB to YUV conversion Matrix Below is the OV9650 RGB to YUV conversion matrix 5 2 1 3 Hue Co...

Page 29: ...d M7M8M9 is swapped in YUV and RGB mode as shown below In YUV output mode Y r M7 g M8 b M9 U r M4 g M5 b M6 V r M1 g M2 b M3 In RGB output mode R r M1 g M2 b M3 G r M4 g M5 b M6 B r M7 g M8 b M9 YUV Derivation from RGB Y 0 59G 0 31R 0 11B U B Y V R Y YCbCr Derivation from RGB Y 0 59G 0 31R 0 11B Cb 0 563 B Y Cr 0 713 R Y B W Derivation from RGB Y Channel ...

Page 30: ...te Pixel Correction The OV9650 has a built in white pixel correction circuit Setting register COM22 1 0 0x8C to 11 enables the white pixel correction function 5 6 Digital Black Level Calibration The OV9650 calibrates black level automatically Setting register TSLB 0 0x3A to high enables black level calibration function Table 5 3 Color Matrix Related Registers and Parameters Function Register Addre...

Page 31: ...e non uniform light transparence the outer areas of the image appears darker than the center area The lens correction function amplifies the outer areas of the image to obtain a uniform image Figure 5 2 Lens Shading Correction Center area of image Outer area of image LCC1 6 0 0x62 LCC2 6 0 0x63 LCC2 7 1 0x63 LCC2 7 0 0x63 LCC1 7 0 0x62 LCC1 7 1 0x62 r ...

Page 32: ...et LCC2 6 0 to Y direction 1 Offset LCC2 6 0 to Y direction 0x63 Lens Correction Center Coordinates Y one bit equals one line in full resolution Radius of the circular section where lens correction is not needed LCC4 0x65 Green Gain Parameter 3 channel R G and B Gain Parameter LCC3 0x64 Green gain parameter if LCC5 2 1 Gain parameter for R G B channels if LCC5 2 0 Multi Gain Control LCC5 2 0 Use r...

Page 33: ...GB 555 Table 6 1 Output Formatting General Controls Function Register Address Mirror Image Enable MVFP 5 0x1E Vertical Flip Enable MVFP 4 0x1E YUV YCbCr Mode COM7 2 0 0x12 RGB Mode Raw RGB COM7 2 1 COM7 0 1 0x12 GRB 4 2 2 COM7 2 1 COM7 0 0 COM15 4 0 0x12 0x40 RGB 565 COM7 2 1 COM7 0 0 COM15 5 0 COM15 4 1 0x12 0x40 RGB 555 COM7 2 1 COM7 0 0 COM15 5 1 COM15 4 1 0x12 0x40 Table 6 2 RGB 555 and RGB 56...

Page 34: ...emented with the sub sampling mode for the camera zoom function For example if the preview image size is 160 x 120 QQVGA the camera can be set to output QQVGA sub sampling mode then set to output QVGA mode 320 x 240 and use the windowing function to capture center quarter area 160 x 120 to implement the 2x zoom in function Then the camera can be set to VGA mode 640 x 480 or SXGA 1280 x 1028 mode t...

Page 35: ...t Enable COM1 6 0x04 High Enable Output Range COM15 7 6 0x40 00 0x10 to 0xF0 01 0x10 to 0xF0 10 0x01 to 0xFE 11 0x00 to 0xFF Frame Rate Adjust Setting by inserting dummy pixels EXHCH 6 4 MSB EXHCL 7 0 LSB 0x2A 0x2B SXGA LSB 1 1520 Line Period increase VGA LSB 1 1600 Line Period increase QVGA LSB 1 1600 Line Period increase QQVGA LSB 1 1600 Line Period increase CIF LSB 1 1040 Line Period increase Q...

Page 36: ...efer to Table 6 4 for the number of dummy pixels that changes the frame rate By inserting dummy lines at frame output the user can get the same data rate and the same data read out time at one frame Also in low light night mode conditions the user can turn on auto frame adjust to decrease the random noise and increase the sensitivity get more exposure time In this mode COM11 7 0x3B is high COM11 6...

Page 37: ...defines the active video period D7 D6 D5 D4 D3 D2 D1 LSB D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 MSB D0 D2 D3 D4 D5 D6 D7 D8 D9 External Device OV9650 External Device OV9650 MSB D9 D8 D9 D8 LSB D9 D8 D0 D1 Default 10 bit Connection Swap 10 bit Connection D7 D6 D5 D4 D3 D2 D1 LSB D0 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 MSB D0 D0 D1 D2 D3 D4 D5 D6 D7 External Device OV9650 External Device ...

Page 38: ... 1 0 0x09 2b 00 2x IOL IOH Enable COM2 1 0 0x09 2b 01 or 2b 10 4x IOL IOH Enable COM2 1 0 0x09 2b 11 Table 8 1 Special Image Effects Mode Register Address Value Normal Color TSLB 7 0 MANU 7 0 MANV 7 0 0x3A 0x67 0x68 0x01 0x80 0x80 Black White TSLB 1 0 MANU 7 0 MANV 7 0 0x3A 0x67 0x68 0x11 0x80 0x80 Sepia TSLB 1 0 MANU 7 0 MANV 7 0 0x3A 0x67 0x68 0x11 0x40 0xA0 Blush TSLB 1 0 MANU 7 0 MANV 7 0 0x3A...

Page 39: ...r AGC and AEC by setting register COM8 2 and COM8 0 0x13 to low respectively Calculate and set the gain VREF 7 6 0x03 GAIN 7 0 0x00 and exposure time AECHM 15 10 0xA1 AECH 9 2 0x10 COM1 1 0 0x04 of the still image from the gain and exposure time of the preview image 5 Wait for two frames and capture the third frame 6 Set back to preview mode and turn on AGC and AEC 7 Preview image AEC 15 0 respond...

Page 40: ...00 248 CIF 000000 01011111 10 382 QCIF 000000 00101111 10 190 QQCIF 000000 00101111 10 190 10 SCCB Interface The OmniVision Serial Camera Control Bus SCCB Functional Specification is available at http www ovt com The Functional Specification provides complete information for using the SCCB to control the features of an OmniVision CAMERACHIP The OV9650 CAMERACHIP uses the SCCB protocol to control t...

Page 41: ... PWDN pin results in lower Standby current see Electrical Characteristics in the OV9650 Datasheet Setting register OFON 3 0x39 to high before standby can reduce the current a little bit 10 1 2 1 Standby Mode Using the PWDN Pin Internal device clock is halted and all internal counters are reset to their default values and all SCCB registers remain unchanged 10 1 2 2 Standby Mode Using the SCCB Inte...

Page 42: ...ange 00 to FF 02 RED 80 RW AWB Red channel gain setting Range 00 to FF 03 VREF 12 RW Vertical Frame Control Bit 7 6 AGC 9 8 see register GAIN for AGC 7 0 Bit 5 3 VREF end low 3 bits high 8 bits at VSTOP 7 0 Bit 2 0 VREF start low 3 bits high 8 bits at VSTRT 7 0 04 COM1 00 RW Common Control 1 Bit 7 Reserved Bit 6 CCIR656 format Bit 5 QQVGA or QQCIF format Effective only when QVGA register bit COM7 ...

Page 43: ...e Bit 2 VarioPixel for VGA CIF QVGA QCIF QQVGA and QQCIF Bit 1 Reserved Bit 0 Single frame output used for Frame Exposure mode only 0D COM4 00 RW Common Control 4 Bit 7 VarioPixel for QVGA QCIF QQVGA and QQCIF Bit 6 3 Reserved Bit 2 Tri state option for output clock at power down period 0 Tri state at this period 1 No tri state at this period Bit 1 Tri state option for output data at power down pe...

Page 44: ...um PCLK can be as high as input clock Bit 6 Use input clock directly no clock pre scale available Bit 5 0 Internal clock pre scalar F internal clock F input clock Bit 5 0 1 Range 0 0000 to 1 1111 12 COM7 00 RW Common Control 7 Bit 7 SCCB Register Reset 0 No change 1 Resets all registers to default values Bit 6 Output format VGA selection Bit 5 Output format CIF selection Bit 4 Output format QVGA s...

Page 45: ...LK output option 0 PCLK always output 1 No PCLK output when HREF is low Bit 4 PCLK reverse Bit 3 HREF reverse Bit 2 Reserved Bit 1 VSYNC negative Bit 0 HSYNC negative 16 RSVD 00 Reserved 17 HSTART 1A RW Output Format Horizontal Frame HREF column start high 8 bit low 3 bits are at HREF 2 0 18 HSTOP BA RW Output Format Horizontal Frame HREF column end high 8 bit low 3 bits are at HREF 5 3 19 VSTRT 0...

Page 46: ...set Bit 6 0 Offset value of 10 bit range 22 GROS 80 RW Gr channel ADBLC result Bit 7 Offset adjustment sign 0 Add offset 1 Subtract offset Bit 6 0 Offset value of 10 bit range 23 ROS 80 RW R channel ADBLC result Bit 7 Offset adjustment sign 0 Add offset 1 Subtract offset Bit 6 0 Offset value of 10 bit range 24 AEW 78 RW AGC AEC Stable Operating Region Upper Limit 25 AEB 68 RW AGC AEC Stable Operat...

Page 47: ... when COM6 0 1 Bit 7 Bias adjustment sign 0 Add bias 1 Subtract bias Bit 6 0 Bias value of 10 bit range 2D ADVFL 00 RW LSB of insert dummy lines in vertical direction 1 bit equals 1 line 2E ADVFH 00 RW MSB of insert dummy lines in vertical direction 2F YAVE 00 RW Y G Channel Average Value 30 HSYST 08 RW HSYNC Rising Edge Delay low 8 bits 31 HSYEN 30 RW HSYNC Falling Edge Delay low 8 bits 32 HREF A...

Page 48: ...Night mode disable 1 Night mode enable If the AGC gain goes over 2 then AGC gain drops to 0 and frame rate changes by half COM11 6 5 limits the minimum frame rate Also ADVFL and ADVFL will be automatically updated Bit 6 5 Night mode insert frame option 00 Normal frame rate 01 1 2 frame rate 10 1 4 frame rate 11 1 8 frame rate Bit 4 3 Average calculation window option 00 Use full frame 01 Use half ...

Page 49: ...t Adjustment Bit 7 4 Edge enhancement threshold 3 0 see register COM22 7 6 for Edge threshold 5 4 Bit 3 0 Edge enhancement factor 40 COM15 C0 RW Common Control 15 Bit 7 6 Data format output full range enable 0x Output range 10 to F0 10 Output range 01 to FE 11 Output range 00 to FF Bit 5 4 RGB 555 565 option must set COM7 2 high x0 Normal RGB output 01 RGB 565 11 RGB 555 Bit 3 Swap R B in RGB565 R...

Page 50: ...0 RW Lens Correction Option 2 Bit 7 Direction of offset on Y axis Bit 6 0 Offset value 64 LCC3 10 RW Lens Correction Option 3 65 LCC4 80 RW Lens Correction Option 4 66 LCC5 00 RW Lens Correction Control Bit 7 3 Reserved Bit 2 Lens correction control select 0 Use LCC3 for Red Green and Blue channel control LCCFB and LCCFR are not used 1 Use LCC3 for Green channel control LCCFB for Blue channel cont...

Page 51: ...enable Bit 0 Reserved 8E COM24 00 RW Common Control 24 Bit 7 0 Reserved 8F DBLC1 0F RW Digital BLC Offset Sign Bit 7 4 Reserved Bit 3 Digital BLC B offset sign Bit 2 Digital BLC R offset sign Bit 1 Digital BLC Gb offset sign Bit 0 Digital BLC Gr offset sign 90 DBLC_B 00 RW Digital BLC B Channel Offset Value Bit 7 0 Digital BLC B channel offset value 91 DBLC_R 00 RW Digital BLC R Channel Offset Val...

Page 52: ...s AECH for AEC 9 2 and COM1 for AEC 1 0 A2 BD50ST 9D RW Banding Filter Value effective only when COM11 0 is low and COM17 0 is high A3 BD60ST 83 RW Banding Filter Value effective only when COM11 0 is low and COM17 0 is low A4 COM25 00 RW Common Control 25 Bit 7 0 Reserved A5 COM26 00 RW Common Control 26 Bit 7 0 Reserved A6 G_GAIN 80 RW Reserved A7 VGA_ST 14 RW Reserved A8 AA ACOM XX Reserved NOTE...

Page 53: ...le The OV9650ECX USB2 0 evaluation module is provided so that potential customers may evaluate both the live video function of the CAMERACHIP as well as the SCCB control interface software The OV9650 CAMERACHIP output is a RGB raw data or YUV stream connected to a USB 2 0 controller operating at a high speed bus data rate 480 Mbps Using a high performance computer system with a USB 2 0 host cannot...

Page 54: ...OmniVision Technologies Version 1 1 December 7 2004 OV9650 Color CMOS SXGA 1 3 MegaPixel CameraChip Omni ision Appendix A Reference SCCB Settings Contact your local OmniVision FAE for updated reference register settings ...

Page 55: ...eproduced This document is provided with no warranties whatsoever including any warranty of merchantability non infringement fitness for any particular purpose or any warranty otherwise arising out of any proposal specification or sample Furthermore OmniVision Technologies Inc disclaims all liability including liability for infringement of any proprietary rights relating to use of information in t...

Page 56: ...56 Proprietary to OmniVision Technologies Version 1 1 December 7 2004 OV9650 Color CMOS SXGA 1 3 MegaPixel CameraChip Omni ision ...

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