Oki PAGE 18, Service Manual, Page: 27 / 395

Page: 11
Service Guide OKIPAGE 18/18n
Chapter 2 Operation Description
2.1 Main Control Board (BOARD-FFF)
The main control board consists of a one-chip CPU, LSI, program/font ROM's, DRAM's, EEPROM, host
interface circuit, and a mechanism driving circuit.
(1) One-chip CPU
The one-chip CPU is a custom CPU (32-bit internal bus, 32-bit external bus, 120-MHz clock) that
incorporates an RISC CPU and its peripheral devices, and has the following functions.
Built-in Device Function
Chip select controller
Bus controller
DRAM controller Control peripheral LSI, ROM, DRAM and I/O device.
DMA controller Transfer of data Host I/F to RAM
Serial interface controller Control of RS232C serial interface.
Parallel interface controller Control of Centronics parallel interface.
Timer Generates various control timings for monitoring paper
feeding and a paper size.
Serial I/O port Inputting of various signals
Outputting of various control signals
I/O port Inputs and outputs the sensor signals and motor signals, etc.
Also performs I/O for EEPROM.
Motor driver controller Control of Main Motor.
Image processing circuit Executes the image data process for printing.
(2) Program/font ROM's
PCL ROM
l
The program/font ROM's store the HP LJ5 emulation program and various types of font. MASK ROM
is used as the program/font ROM's.
PS ROM
l
The program/font ROM's store the Adobe PostScript Level 2 program and its fonts.
(3) DRAM
16-Megabyte DRAM (64 Mbit DRAM x 2) is mounted as resident memory to be used for storing the
program and providing various buffers. This DRAM is expandable up to 128 Mbytes by
adding expansion memory (SIMMs). This DRAM provides the areas shown in the following table.