Oki MSM85C154HVS, User Manual

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INPUT/OUTPUT PORTS
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5.6 Port 0, 1, 2, and 3 Output and Floating Status Settings in CPU Power Down
Mode (PD, HPD)
The port 0, 1, 2, and 3 output status can be set to either data output or floating when
MSM80C154S/MSM83C154S is in power down mode (PD, HPD).
To set these ports to output status in power down mode, bit 0 (ALF) of the I/O control register
(IOCON 0F8H) is reset to “0” before PD or HPD mode is activated (see Figure 5-11). The CPU
is then stopped with the ports in data output status when power down mode is started.
And to set the ports to floating status in power down mode, “1” is set in bit 0 (ALF) of the I/
O control register (IOCON 0F8H) before PD or HPD mode is activated (see Figure 5-11). The
port output driver is disconnected from the port pins when power down mode is started.
If “1” output from port becomes a power supply factor in respect to the external circuits when
PD or HPD mode is activated in port data output mode, the PD or HPD mode should be
activated after the port data is reset to “0” by software. And in the reverse case, PD or HPD
mode is activated after the port data is set to “1”.
When port pins are in floating status during PD or HPD mode, the port pin status of all pins
except pins 2 thru 5 of port 3 may be either open or undefined in the –0.5 to V
CC
+0.5V range.
This mode is used only in battery back-up of CPU data.