NXP Semiconductors
UM191812
PN544 C2 User Manual
191812
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User Manual
Rev. 1.2 — 2010-06-16
88 of 172
One reader phase, with one RF type only:
If a reader phase is started, the duration of it is fixed (depending on RF type). Then
PN544 waits, during
NXP_PL_PAUSE
time. Then it starts again the reader phase, and
so on (until a card is detected).
HOST
PN544
NXP_PL_RDPHASES
Status Phase byte = 0x81
(Type A det Pause)
Polling
Loop
Gate
Polling
Loop
Gate
Pause
Reader Phase
Detection
Type A
Pause Phase = 200ms
Type A
Reader
Gate
Type A
Reader
Gate
EVT_READER_REQUESTED
Polling
Loop
Gate
Polling
Loop
Gate
NXP_PL_PAUSE
Pause Phase Duration = 0x1046 = 200 ms
(1)
Fig 51. Reader Phase only
In this example, the host wants to act as an ISO14443A reader.
After correct initialization, as shown in Fig 51, the PN544 will regularly look for
ISO14443A cards in the field.
If no card answers, PN544 goes then into a PAUSE phase, during a duration defined in
the registry
NXP_PL_PAUSE.
The PAUSE phase power mode is the one set according
to
PWR_STATUS
EEPROM area value.
Note: During the reader phases, PN544 can ask for the system clock. It is not shown on
the figure (for detail on clock request, refer to Clock Management chapter).
One reader phase, with several RF types:
PN544 goes through all the reader phases, then, it waits, during
NXP_PL_PAUSE
time.
Then it starts again the reader phases, and so on (until a card is detected).