NXP Semiconductors
UM191812
PN544 C2 User Manual
191812
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User Manual
Rev. 1.2 — 2010-06-16
26 of 172
7.4.6 HSU
All communication is performed via RX and TX. Data may be sent or received at any
point in time and could overlap (full duplex). The interrupt pin will notify that is being sent.
However, it is not mandatory to use that pin. Multiple baud rates are supported.
Automatic baud rate detection is not supported. Flow control signals known from RS232
(such as DTR, DSR, RI, ...) are not supported. Data is conveyed in least significant bit,
most significant byte first order.
In order to detect invalid frames a CRC is conveyed along with the frame. The maximum
size of a single frame is 33 Bytes. Considering the header offset 29 bytes remain for HCI.
This is the same frame length as for the SWP interface if the LEN byte is not counted.
Note: A special attention is needed for HSU & System Clock. See
7.4.6.1 Example: Frame Transfer from Host to PN544
The host conveys the frame to PN544 by applying the complete byte stream on the TX
line. No handshaking takes place between the characters. If the receiver (PN544)
observed a problem, it will resort to error recovery and may request to re-transmit this
frame.
(2) T
ic
: inter-character timeout
Fig 18. Sample Transfer Host to PN544
7.4.6.2 Example: Frame Transfer from PN544 to Host
The PN544 conveys the frame to the host by applying the complete byte stream on the
RX line. No handshaking takes place between the characters. If the receiver (host)
observed a problem, it shall resort to error recovery and may request to retransmit this
frame.