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NXP Semiconductors
JN-RM-2080
K32W module development reference manual
JN-RM-2080
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© NXP Semiconductors N.V. 2020. All rights reserved.
Reference manual
Rev. 1.0
— 27 Mar 2020
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design are followed exactly in the RF region of the board, sensitivity, output power,
harmonic and spurious radiation, and range will have a high likelihood of first-time
success.
The following subsections describe important considerations when implementing a
wireless hardware design starting with the device footprint, PCB stack-up, RF circuit
implementation, and antenna selection. The following figure shows an example of a
typical layout with the critical RF section which must be copied exactly for optimal radio
performance. The less critical layout area can be modified without reducing radio
performance.
NOTE:
Exact dimensions are not given in this document, but can be found in the manufacturing
files for the K32W061/ modules
4.1 K32W061/041 device footprint
The performance of the wireless link is larg
ely influenced by the device’s footprint. As a
result, a great deal of care has been put into creating a footprint so that receiver
sensitivity and output power are optimized to enable board matching and minimal
component count. NXP highly recommends copying the die flag exactly as it is shown in
the following figure; this includes via locations as well. Deviation from these parameters
can cause performance degradation.
RFIO
GND vias
Die flag
Fig 5.
Critical Layout of die flag area
shows the critical areas of the device die flag. These are the following:
• Ground vias and locations
• RF output and ground traces
