• DCDC_REG2[DCDC_BATTMONITOR_EN_BATADJ]
This Bit enables the DC-DC to perform the loop control calculation based on the VDCDC_IN value contained on
DCDC_BATTMONITOR_BATT_VAL field. To guarantee the output voltages regulation, it is recommended to use the method of
periodically measuring the VDCDC_IN, using the ADC, and to update the DCDC_BATTMONITOR_BATT_VAL.
The bit DCDC_BATTMONITOR_EN_BATADJ must be cleared before updating the DCDC_BATTMONITOR_BATT_VAL and
must be set to 1 after correct writing to DCDC_BATTMONITOR_BATT_VAL. This procedure is important to allow the DC-DC
control loop machine to calculate the output voltages.
• DCDC_REG2[DCDC_BATTMONITOR_BATT_VAL]
This field is responsible for providing the accurate input VDCDC_IN voltage value to the DC-DC control machine to perform the
proper loop calculation. It is very important to update this value at a refresh rate needed by the application. For example, if it is
expected the battery to decay slowly, this field may be updated a couple of times per hour our days. If it is expected a stable
input voltage, the application may program this value once after startup. If this field is not correctly updated, it is expected a wrong
VDD_1P8 and VDD_1P5 output voltage values.
The accepted format value for this bit field is 8 mV LSB, that means each binary step represents 8 mV. For example, if the
VDCDC_IN ADC measured voltage is 3.0 V (3000 mV), the value to update this field is 3000/8 = 375 in decimal or 0x177
in hexadecimal.
4.5.4 DCDC_REG3
• DCDC_REG3[DCDC_VDD1P5CTRL_ADJTN]
This bit field is only used for manual control loop, where DCDC_REG2[DCDC_BATTMONITOR_EN_BATADJ] is cleared,
disabling the battery monitor feature and turning off the automatic calculation for the loop control. It is recommended not to use
this method and always leave this field in its reset default state.
• DCDC_REG3[DCDC_MINPWR_DOUBLE_FETS_PULSED]
This bit adds a double size FET on the DC-DC output, replacing the normal size FET on low-power modes (pulsed). This double
FET has a smaller RDS (resistance from drain to source), but pre-driver consumes a slightly higher current. As the current
consumption depends on the application dynamic loading, the recommendation is to try out if this feature reduces current.
Otherwise, application may leave it on reset default state.
• DCDC_REG3[DCDC_MINPWR_HALF_FETS_PULSED]
This bit adds a half size FET on the DC-DC output, replacing the normal size FET on low-power modes (pulsed). This half FET has
a slightly higher RDS (resistance from drain to source), but pre-driver consumes less current. As the current consumption depends
on the application dynamic loading, the recommendation is to try out if this feature reduces current. Otherwise, application may
leave it on reset default state.
• DCDC_REG3[DCDC_MINPWR_DOUBLE_FETS]
This bit is similar as previous bit explained, the only difference is that it configures the double FETs for continuous mode.
• DCDC_REG3[DCDC_MINPWR_HALF_FETS]
This bit is similar as previous bit explained, the only difference is that it configures the half FETs for continuous mode.
• DCDC_REG3[DCDC_VDD1P5CTRL_DISABLE_STEP]
This bit enables or disables the stepping mode during VDD_1P5 voltage adjustment. Before changing the VDD_1P5 output
voltage level, it is recommended to enable the stepping, that is, to configure this bit to logic 0. It makes the DC-DC module to
increase or decrease the voltage in steps of 25 mV, eliminating unwanted overshoot or undershoot.
Before entering to low-power mode (pulsed), this bit must be set to disable the stepping control.
• DCDC_REG3[DCDC_VDD1P8CTRL_DISABLE_STEP]
This bit enables or disables the stepping mode during VDD_1P8 voltage adjustment. Before changing the VDD_1P8 output
voltage level it is recommended to enable the stepping, that is, to configure this bit to logic 0. It makes the DC-DC module to
increase or decrease the voltage in steps of 25 mV, eliminating unwanted overshoot or undershoot.
NXP Semiconductors
DC-DC converter software setup
MKW4xZ/3xZ/3xA/2xZ DC-DC Power Management, Rev. 3, 04 June 2021
Application Note
15 / 28
