Register map and OTP memory
A3M34SL039 Airfast Power Amplifier Module with Autobias Control, Rev. 0, September 2022
Data Sheet: Technical Data
7
/
33
3 Register map and OTP memory
3.1 One-time programmable memory
The A3M34SL039 contains a one-time programmable (OTP) memory array that is used to store register values for the
integrated autobias controller. The data sheet I
DQ
target values are determined and programmed into the OTP memory during
NXP’s production testing. When programmed, the OTP memory is used to store these values for automatic loading into
autobias registers at power on or reset. These values can be overwritten using the Engineering Mode (EM) sequence;
however, the overwritten values do not persist after a power cycle or a reset.
The OTP memory can be programmed only by NXP during the manufacturing process and cannot be changed by the user.
The values in OTP memory have been selected to allow the device to operate in a wide variety of applications.
3.2 Register map
There are nine 8-bit user accessible registers available in the A3M34SL039. The register mapping is listed in
Address 0 RW register is designed to control soft reset, refresh OTP and read the chip version. Address 1
−
6 registers are RW
and/or OTP controlled and provide settings for the two RF transistor group DACs. Address 15 is read only for temperature
sense functionality. Address 17 is a virtual write only register for enabling Engineering Mode.
