Register map and OTP memory
A3M34SL039 Airfast Power Amplifier Module with Autobias Control, Rev. 0, September 2022
Data Sheet: Technical Data
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Table 11. Register overview and bit description
Address
Register
Name
Bit
Bit Descriptions
Power
On/Reset
Value
1
Overwritten
by OTP
Attribute
EM
Mode
0
System_Reg
7
Not available
N/A
N/A
N/A
N/A
6
Soft Reset. A 1 written to this register
will perform a reset of all registers to
their default values. A 0 should be
written after the reset operation is
completed.
0
No
RW
5
Refresh OTP. A 1 written to this
register will overwrite values stored
in OTP into registers identified in the
"Overwritten by OTP" column. A 0
should be written after the reset
operation is completed.
0
No
4
Not available
N/A
N/A
N/A
0–3 Chip version bits. Inserted by NXP to
provide revision information. Cannot
be changed.
N/A
No
R
1
A_Sense_DAC 6–7 Not available
N/A
N/A
N/A
0–5 Sense DAC A 6-bit logic value for
carrier amplifiers. DAC A sets the
reference voltage to compare to the
V
DS
across the reference device.
Minimum typical value is 6'b001000
and maximum value is 6'b111111.
Recommendation is that the value in
this register be set higher than
6'b010000.
6'h20
Yes
RW
2
Yes
2
A_VGS1_DAC 0–7 Sets 8-bit DAC logic value for carrier
amplifier driver stage. 8'h00 sets
gate to equal ceiling voltage. 8'hFF
reduces gate voltage by a max
value.
8'h80
3
A_VGS2_DAC 0–7 Sets 8-bit DAC logic value for carrier
amplifier final stage. 8'h00 sets gate
to equal ceiling voltage. 8'hFF
reduces gate voltage by a max
value.
8'h80
(continued)
