Nvidia Jetson AGX Xavier Series, Design Manual

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Video Input
Jetson AGX Xavier Series Product DG-09840-001_v2.5 | 80
Table 10-2. Jetson AGX Xavier Camera Miscellaneous Pin Description
Pin #
Module Pin
Name
SoC Signal Usage/Description
Usage on NVIDIA
Carrier Board
Direction Pin Type
J54 MCLK02
EXTPERIPH1_CL
K
Camera 0 Master Clock
Camera Connector
Output CMOS – 1.8V
H53 MCLK03
EXTPERIPH2_CL
K
Camera 1 Master Clock
H55 MCLK04 SOC_GPIO41 Camera 2 Master Clock
L57 MCLK05 SOC_GPIO42 Camera 2 Master Clock Expansion Connector
F53 I2C3_CLK CAM_I2C_SCL General I2C 3 Clock
Camera Connector Bidir
Open-Drain –
1.8V
E53 I2C3_DAT CAM_I2C_SDA General I2C 3 Data
F10 GPIO15 DAP5_SCLK GPIO / Digital Speaker Output Clock
Camera Connector
(Camera 1 Powerdown)
Output CMOS – 1.8V
F9 GPIO16 DAP5_DOUT GPIO / Digital Speaker Output Data
Camera Connector
(Camera 1 Reset)
K49 GPIO25 SOC_GPIO50 GPIO
Camera Connector
(VDD_SYS Enable)
F56 GPIO36 SOC_GPIO53 GPIO Camera AVDD Enable
L49 UART4_CTS UART4_CTS GPIO
Camera Connector
(Camera 0 Powerdown)
L5 UART4_TX UART4_TX GPIO
Camera Connector
(Camera 0 Reset)
Notes:
1.
In the Type/Dir column, Output is from Jetson AGX Xavier. Input is to Jetson AGX Xavier. Bidir is for Bidirectional signals.
2. The direction shown in this table for MCLKx, GPIO[16:15], and UART4x is true when used for those functions. These pins are
GPIOs and can support input or output (bidirectional).
Table 10-3. CSI Configurations D-PHY Mode
Signal Name
x2 Configurations x4 Configurations
#1 #2 #3 #4 #5 #6 #1 #2 #3 #4
CSI_0_D0_P/N
Data
Data
CSI_0_D1_P/N
CSI_1_D0_P/N
Data
CSI_1_D1_P/N
CSI_2_D0_P/N
Data
Data
CSI_2_D1_P/N
CSI_3_D0_P/N
Data
CSI_3_D1_P/N
CSI_4_D0_P/N
Data
Data
CSI_4_D1_P/N
CSI_5_D0_P/N
CSI_5_D1_P/N