USB, PCIe, and UFS
Jetson AGX Xavier Series Product
DG-09840-001_v2.5 | 54
Parameter
Requirement
Units
Notes
Within pair (intra-pair) matching between
subsequent discontinuities
0.15 (0.5)
mm (ps)
Differential pair uncoupled length
41.9
ps
Via
Via placement
Place
GND
vias as symmetrically as possible to data pair vias.
GND
via distance should
be placed less than 1x the diff pair via pitch
Max # of Vias
4
Use micro via or back drilled via - no via stub
allowed.
Max Via stub length
na
Not Allowed
AC Cap
Value
Min/Max
0.22
uF
20%, 0402 X5R or better. Only required
for TX pair when routed to connector.
Place close to TX side.
Voiding
Voiding the plane directly under
the pad 3-4 mils larger than the
pad size is required.
Serpentine (See USB 3.1 Guidelines)
Miscellaneous
GND fill rule
Remove unwanted GND fill that is either floating or act like antenna
Connector
Voiding
Void all layers of golden finger
area under the pad 5.7 mils
larger than the pad size is
recommended.
Keep critical PCIe traces such as PEX_TX/RX, TERMP etc. away from other signal traces or unrelated power traces/areas or
power supply components
Table 7-14.
PCIe Signal Connections Module I/Fs Configured as Root Ports
Parameter
Requirement
Units
Notes
Specification
Data Rate / UI Period
16.0 / 62.5
Gbps / ps
8.0GHz, half-rate architecture
Topology
Point-point
Unidirectional,
differential. Driven by
100MHz common reference clock
Termination
43
Ω
To GND Single Ended for P and N
Impedance
Trace Impedance
differential / Single Ended
85 / 50
Ω
±15%
Reference plane
GND
Fiber-weave effect
•
Use spread-glass
(denser weave) instead
of regular-glass
(sparse weave) to
minimize intra-pair
skew
Example of zig-zag routing
