USB, PCIe, and UFS
Jetson AGX Xavier Series Product
DG-09840-001_v2.5 | 45
Parameter
Requirement
Units
Notes
Main-route
3x
Dielectric
height
Stripline structure in a GSSG structure is
assumed (holds in broadside-coupled
stripline structure)
Max length
Breakout (L
BRK
)
Main-route
11
Max trace length
- L
BRK
mm
Trace Spacing for TX/RX Interleaving
Max Pair-pair spacing, Spacing to plane and SMT
pad, and Spacing to unrelated high-speed signals
Microstrip . Stripline
4x / 3x
Dielectric
height
Via
Via proximity (Signal via to GND return via)
< 3.8 (24)
mm (ps)
See note 1
Topology
Y-pattern is recommended
Keep symmetry
Y-pattern helps with
Xtalk suppression. It
can also reduce the
limit of the pair-pair
distance. Review
needed (NEXT/FEXT
check) if via
placement does not use Y-pattern.
GND via
Place GND via as
symmetrically as possible
to data pair vias. Up to 4
signal vias (2 diff pairs) can
share a single GND return
via
GND via is used to maintain return
path, while its Xtalk suppression is
limited
Max # of Vias
PTH vias
Micro Vias
4 if all vias are PTH via
Not limited
As long as total channel loss meets IL spec
Max Via Stub Length
0.4
mm
long via stub requires review (IL and
resonance dip check)
Serpentine
Min bend angle
135
deg (a)
Dimension
Min A Spacing
Min B, C Length
Min Jog Width
4x
1.5x
3x
Trace width
S1 must be taken care in
order to consider Xtalk to
adjacent pair
Add-on Components
Placement order
SoC – AC capacitor – Common
mode choke – ESD –
Device/Connector
AC Cap
