NSB-9
System Module and User Interface
CCS Technical Documentation
Page 26
Nokia Corporation
Issue 1 04/03
4 RTC Alarm, the RTC has been programmed to give an alarm
After receiving one of the above signals, the UEM counts a 20ms delay and then enters
it’s reset mode. The watchdog starts up, and if the battery voltage is greater than Vcoff+
a 200ms delay is started to allow references etc. to settle. After this delay elapses the
VFLASH1 regulator is enabled. 500us later VR3, VANA, VIO and VCORE are enabled.
Finally the PURX (Power Up Reset) line is held low for 20 ms. This reset, PURX, is fed to
the baseband ASIC UPP, resets are generated for the MCU and the DSP. During this reset
phase the UEM forces the VCTCXO regulator on regardless of the status of the sleep con-
trol input signal to the UEM. The FLSRSTx from the ASIC is used to reset the flash during
power up and to put the flash in power down during sleep. All baseband regulators are
switched on at the UEM power on except VSIM and VFLASH2 regulators which are con-
trolled by the MCU. The UEM internal watchdogs are running during the UEM reset state,
with the longest watchdog time selected. If the watchdog expires the UEM returns to
power off state. The UEM watchdogs are internally acknowledged at the rising edge of
the PURX signal in order to always give the same watchdog response time to the MCU.
Power up with PWR key
When the Power on key is pressed the UEM enters the power up sequence as described
above. Pressing the power key causes the PWRONX pin on the UEM to be grounded. The
UEM PWRONX signal is not part of the keypad matrix. The power key is only connected
to the UEM. This means that when pressing the power key an interrupt is generated to
the UPP that starts the MCU. The MCU then reads the UEM interrupt register and notice
that it is a PWRONX interrupt. The MCU now reads the status of the PWRONX signal
using the UEM control bus, CBUS. If the PWRONX signal stay low for a certain time the
MCU accepts this as a valid power on state and continues with the SW initialization of
the baseband. If the power on key do not indicate a valid power on situation the MCU
powers off the baseband.
Power up when charger is connected
In order to be able to detect and start charging in a case where the main battery is fully
discharged (empty) and hence UEM has no supply (NO_SUPPLY or BACKUP mode of
UEM) charging is controlled by START-UP CHARGING circuitry.
Whenever VBAT level is detected to be below master reset threshold (VMSTR-) charging
is controlled by START_UP charge circuitry. Connecting a charger forces VCHAR input to
rise above charger detection threshold, . By detection start-up charging is
started. UEM generates 100mA constant output current from the connected charger’s
output voltage. As battery charges its voltage rises, and when VBAT voltage level higher
than master reset threshold limit (VMSTR+) is detected START_UP charge is terminated.
Monitoring the VBAT voltage level is done by charge control block (CHACON). MSTRX=‘1’
output reset signal (internal to UEM) is given to UEM’s RESET block when VBAT>VMSTR+
and UEM enters into reset sequence described earlier.
If VBAT is detected to fall below VMSTR- during start-up charging, charging is cancelled.
It will restart if new rising edge on VCHAR input is detected (VCHAR rising above VCH-
DET+).
