Copyright © 2021 NEXCOM International Co., Ltd. All Rights Reserved.
106
NSA 7150/7150A User Manual
Chapter 4: BIOS Setup
Version 2.21.1279. Copyright (C) 2021 American Megatrends, Inc.
Aptio Setup Utility - Copyright (C) 2021 American Megatrends, Inc.
→←: Select Screen
↑↓: Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save & Exit
ESC: Exit
Enable/Disable MCTP
Port 4A
-----------------------------------------------------------------------------------...
Corr Err Over
ACPI PME Interrupt
P2P Memory Read
PME to ACK
PM ACPI Mode
Unsupported Request
Alternate TxEq
SRIS
ECRC Generation
ECRC Check
SERRE
IODC Configuration
Non-Transparent
Bridge PCIe Port Definition
Imbar2 Size
Embar1 Size
Embar2 Size
Hide Port?
MCTP
Server Mgmt
Advanced
Platform Configuration
Socket Configuration
Main
[No]
[No]
[Enable]
[Enable]
[No]
[Disable]
[Disable]
[Disable]
[Disable]
[Disable]
[Disable]
[KTI Option]
[Transparent Bridge]
22
22
22
[No]
[Yes]
Port 4A
▼
▲
Version 2.21.1279. Copyright (C) 2021 American Megatrends, Inc.
Aptio Setup Utility - Copyright (C) 2021 American Megatrends, Inc.
→←: Select Screen
↑↓: Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save & Exit
ESC: Exit
In auto mode the BIOS will
remove the EXP port if there is
no device or errors on that device
and the device is not HP capable.
Disable is used to disable the
port and hide its CFG space.
Port 4A
-----------------------------------------------------------------------------------...
PCI-E Port
Link Speed
Override Max Link Width
PCI-E Port DeEmphasis
PCI-E Port Link Status
PCI-E Port Link Max
PCI-E Port Link Speed
PCI-E Port Clocking
PCI-E Port Clock Gating
Data Link Feature Exchange
PCI-E Port MPSS
PCI-E Port D-state
PCI-E ASPM Support
MSI
PCI-E Extended Sync
PCI-E Detect Wait Time
Compliance Mode
EOI
Fatal Err Over
Non-Fatal Err Over
Server Mgmt
Advanced
Platform Configuration
Socket Configuration
Main
[Auto]
[Auto]
[Auto]
[-3.5 dB]
Link Did Not Train
Max Width x8
Link Did Not Train
[Common]
[Enable]
[Enable]
[Auto]
[D0]
[Disable]
[Disable]
[No]
[Auto]
[No]
[Disable]
[No]
[No]
▼
▲
PCI-E Port
Enables or disables the PCIe port. In auto mode the BIOS will remove the
EXP port if there is no device or errors on that device and the device is not
HP capable. Disable is used to disable the port and hide its CFG space.
Link Speed
Configures the link speed for the PCIe port.
Override Max Link Width
Configures the link speed to override the max link width set by bifurcation.
PCI-E Port DeEmphasis
Configures the de-emphasis control for the PCIe port.
PCI-E Port Clocking
Configures the option for PCI-E Port Clocking.
PCI-E Port Clock Gating
Enables or disables PCIe clock gating for each root port.
Data Link Feature Exchange
Enables or disables Data Link Feature Exchange in PCIe 4.0.
PCI-E Port MPSS
Configures the option for max payload size supported for PCI-E port.
PCI-E Port D-state
Configures the PCIe port to normal power state or low power state.
