µ
PD78C14(A)
21
Instruc-
tion group
Instruction code
Mnemonic
Operand
State
Operation
Skip
condition
B1
B2
B3
B4
A, r
0 1 1 0 0 0 0 0
8
A–r
r, A
0 1 1 1
8
r–A
1 1 0 0
A, r
8
A r
A, r
rpa
rpa
1 1 0 1
1 1 0 0 0 A
2
A
1
A
0
1 1 0 1
8
A r
11
A
←
A+(rpa)
11
A
←
A+(rpa)+CY
8-bit arithmetic operation (memory)
SBBX
ANAX
XRAX
GTAX
LTAX
NEAX
rpa
rpa
rpa
rpa
rpa
rpa
1 0 0 1 0 A
2
A
1
A
0
rpa
1 0 1 0 1 A
2
A
1
A
0
rpa
1 1 0 0
1 1 0 1
1 1 1 0
11
11
11
11
11
11
11
11
11
11
11
11
11
A
←
A+(rpa)
A
←
A–(rpa)
A
←
A–(rpa)–CY
A
←
A–(rpa)
A
←
A (rpa)
A
←
A (rpa)
A
←
A (rpa)
A–(rpa)–1
A–(rpa)
A–(rpa)
A–(rpa)
A (rpa)
EQA
ONA
ADDX
ADDNCX
rpa
rpa
rpa
rpa
1 1 1 1 1 R
2
R
1
R
0
1 1 1 1
1 1 1 0
1 0 0 1
1 1 1 1
1 0 1 1
1 0 0 0 1 A
2
A
1
A
0
1 0 1 0
1 0 1 1
Zero
rpa
<
>
No Zero
Zero
Borrow
No
Borrow
No
Carry
Zero
No
Borrow
No Zero
Zero
Zero
No Zero
<
<
>
<
OFFA
ADCX
SUBX
SUBNBX
ORAX
EQAX
ONAX
OFFAX
0 1 1 1 0 0 0 0
A (rpa)
<
8-bit arithmetic
operation (register)
*