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Connections

Connecting to the world is accomplished through the 100mil headers on the LM4681 demonstration board. The functions of the
different headers are detailed in Table 1.

TABLE 1. LM4681 Demonstration Board Connections

Jumper Designation

Function or Use

JP1

Power supply connection. Connect an external power supply’s

positive voltage source to the JP1 pin labeled “VDD” and the

supply’s ground source to the pin labeled “GND.”

JP2

This is the connection to the amplifier’s input A (labeled as the

“LF_IN” input on the demonstration board). Apply an external

signal source’s positive voltage to the JP2 pin labeled “IN” and the

signal source’s ground reference to the pin labeled “GND.”

JP3

This is the connection to the amplifier’s output A (labeled as the

"LEFT_OUT” output on the demonstration board). Connect the JP3

pin labeled “+” to the positive input of an external signal

measurement device. Connect the JP3 pin labeled “-” to the

negative input of an external signal measurement device.

JP4

This is the connection to the amplifier’s input B (labeled as the

“RT_IN” input on the demonstration board). Apply an external

signal source’s positive voltage to the JP4 pin labeled “IN” and the

signal source’s ground reference to the pin labeled “GND.”

JP5

This is the connection to the amplifier’s output B (labeled as the

“RIGHT_OUT” output on the demonstration board). Connect the

JP5 pin labeled “+” to the positive input of an external signal

measurement device. Connect the JP5 pin labeled “-” to the

negative input of an external signal measurement device.

JP6

If an external I

2

C power supply voltage is used, connect this

supply’s positive voltage source to the JP6 pin labeled “I2CVDD”

and the supply’s ground source to the pin labeled “GND.” If no

external supply is used, leave this jumper’s pins unconnected.

JP7

This header is used for the I

2

C signal inputs. JP7-pin 1 is for an

I

2

CV

DD

that is generated by the I

2

C signal source, JP7-pin 2 is for

the SCL signal, JP7-pin 3 is for GND, JP7-pin 4 is for the ADR

signal, and JP7-pin 6 is for the SDA signal.

JP8

This three-pin jumper selects either I

2

C or SPI digital interface

protocol. Short pins 1 and 2 together SPI protocol is used. Short

pins 2 and 3 together when I

2

C protocol is used.

Power Supply Sequencing

The LM4681 uses two power supply voltage: V

DD

for the

Class D power amplifier and the Class AB headphone am-
plifier and I

2

CV

DD

for the digital controls (volume, shutdown,

etc.). To ensure proper functionality, apply I

2

CV

DD

first, fol-

lowed by V

DD

. The part will power-up with shutdown active,

the volume control set to minimum, and mute active.

I

2

C Signal Generation Board and

Software

The I

2

C signal generation and interface board, along with the

LM4681 software, will generate the address byte and the

data byte used in the I

2

C control data transaction. To use the

I

2

C signal generation and interface board, please plug it into

a PC’s parallel port (on either a notebook or a desktop
computer).

The software comes with an installer. To install, unzip the file
titled “LM4681_Software_ver1-1.” After the file unzips,
double-click the “setup.exe” file. After it launches, please
follow the installer’s instructions. Setup will create a folder
named “LM4681” in the “Program” folder on the “C” disk (if
the default is used) along with a shortcut of the same name
in the “Programs” folder in the “Start” menu.

AN-1488

www.national.com

4

Summary of Contents for LM4681

Page 1: ...l to jumpers JP4 and JP2 Apply the source s signal and ground to the IN1 pin and the GND pin respectively Connect a load 8Ω between the pins on JP5 and another load between the pins on JP3 Apply power Make measurements Plug in a pair of head phones Enjoy Introduction To help the user investigate and evaluate the LM4681 s performance and capabilities a fully populated demonstra tion board is availa...

Page 2: ...area The LM4681 features a shutdown mode for micropower dissipation an internal thermal shutdown protection mecha nism and output stage fault detect and current limit protec tion Operating Conditions Temperature Range 40 C TA 85 C Amplifier Power Supply Voltage 9 0V VDD 15 5V Board Features The LM4681 demonstration board has all of the necessary connections using 100mil headers to apply the power ...

Page 3: ...Schematic Continued 20195908 Figure 2 The LM4681 Demonstration Board Schematic AN 1488 www national com 3 ...

Page 4: ...age is used connect this supply s positive voltage source to the JP6 pin labeled I2CVDD and the supply s ground source to the pin labeled GND If no external supply is used leave this jumper s pins unconnected JP7 This header is used for the I2 C signal inputs JP7 pin 1 is for an I2 CVDD that is generated by the I2 C signal source JP7 pin 2 is for the SCL signal JP7 pin 3 is for GND JP7 pin 4 is fo...

Page 5: ... can be set to 1 or 0 The software will force the I2 C interface board to apply a logic low or logic high to the LM4681 s ADR pin according to the radio button that is selected The LM4681 will respond to either of the ad dresses selected in the software s Address Bit control PCB Layout Guidelines This section provides general practical guidelines for PCB layouts that use various power and ground t...

Page 6: ...CC2013 0805 Surface Mount 1 0µF 50V Ceramic C14 Capacitor CC2013 0805 Surface Mount 1 0µF 50V Ceramic C15 Capacitor CC2013 0805 Surface Mount 1µF 50V Ceramic C16 Capacitor CC2013 0805 Surface Mount 0 1µF 50V Ceramic C17 Capacitor CC2013 0805 Surface Mount 270nF 50V Ceramic C18 Capacitor CC2013 0805 Surface Mount 270nF 50V Ceramic C19 Capacitor CC2013 0805 Surface Mount 270nF 50V Ceramic C20 Capaci...

Page 7: ...ration board Figure 4 is the silkscreen that shows parts location Figure 5 is the top layer Figure 6 is the upper inner layer Figure 7 is the lower inner layer Figure 8 is the bottom layer 20195909 Figure 4 Top Silkscreen Shown 2 6X actual size 20195910 Figure 5 Top Layer Shown 2 6X actual size AN 1488 www national com 7 ...

Page 8: ...Demonstration Board PCB Layout Continued 20195911 Figure 6 Upper Middle Layer Shown 2 6X actual size 20195912 Figure 7 Lower Middle Layer Shown 2 6X actual size AN 1488 www national com 8 ...

Page 9: ...Demonstration Board PCB Layout Continued 20195913 Figure 8 Bottom Layer Shown 2 6X actual size AN 1488 www national com 9 ...

Page 10: ... mode THD N versus Frequency performance curves at VDD 12V are shown in Figure 11 and Figure 12 respectively 20195914 RL 8Ω fIN 1kHz VDD 12V Figure 9 Class D Amplifier THD N vs Output Power 20195915 RL 32Ω fIN 1kHz VDD 12V Figure 10 Class AB Headphone Amplifier THD N vs Output Power 20195916 RL 8Ω fIN 1kHz VDD 12V PO 1W Figure 11 Class D Amplifier HD N vs Frequency 20195917 RL 32Ω fIN 1kHz VDD 12V...

Page 11: ...in the two internal I2 C control registers Table A1 LM4681 I2 C SPI Control Register Addressing and Data Format Chart B7 B6 B5 B4 B3 B2 B1 B0 I2 C Address 1 1 0 1 1 0 ADR 0 Mode Control Register 0 X 0 X X X 0 Mute Active 0 Shutdown Active Volume Control Register See Table 4 1 0 0 V4 V3 V2 V1 V0 AN 1488 www national com 11 ...

Page 12: ... 1 0 0 0 25 94 9 03 0 1 0 0 1 22 94 6 03 0 1 0 1 0 20 94 4 03 0 1 0 1 1 18 94 2 03 0 1 1 0 0 16 94 0 03 0 1 1 0 1 14 94 1 97 0 1 1 1 0 12 94 3 97 0 1 1 1 1 10 94 5 97 1 0 0 0 0 8 94 7 97 1 0 0 0 1 6 94 9 97 1 0 0 1 0 4 94 11 97 1 0 0 1 1 2 94 13 97 1 0 1 0 0 0 94 15 97 1 0 1 0 1 1 06 17 97 1 0 1 1 0 3 06 19 97 1 0 1 1 1 6 06 22 97 1 1 0 0 0 7 07 23 97 1 1 0 0 1 8 06 24 97 1 1 0 1 0 9 06 25 97 1 1 ...

Page 13: ...user 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness BANNED SUBSTANCE COMPLIANCE National Semiconductor follows the provisions of the Product Stewardship Guide for Customers CSP 9 111C2 and Banned Substances and Materials ...

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