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Appendix A LM4681 I
2
C/SPI Control Register
Table A1 shows the actions that are implemented by manipulating the bits within the two internal I
2
C control registers.
Table A1. LM4681 I
2
C/SPI Control Register Addressing and Data Format Chart
B7
B6
B5
B4
B3
B2
B1
B0
I
2
C
Address
1
1
0
1
1
0
ADR
0
Mode
Control
Register
0
X
0
X
X
X
0
Mute
Active
0
Shutdown
Active
Volume
Control
Register
(See
Table 4 )
1
0
0
V4
V3
V2
V1
V0
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