background image

I

2

C Signal Generation Board and Software

(Continued)

20195907

Figure 3. The LM4681 Demonstration Board Schematic

The LM4681 program includes controls for the amplifier’s
volume control, shutdown, mute, and which serial interface
(I2C or SPI) is used. The control program’s on-screen user
interface is shown in Figure 3.

The

DEFAULT

button is used to return the LM4681 to its

power-on reset state (minimum volume setting, mute on, and
shutdown on).

The LM4681’s stereo

VOLUME CONTROL

has 32 steps

and a gain range of –48dB to +30dB (Class D) or –65dB to
+13dB (Class AB headphone). It is controlled using the slider
located at the top of the program’s window. Each time the
slider is moved from one tick mark to another, the program
updates the amplifier’s volume control.

The

POWER

control has two radio buttons. When OFF is

selected, the LM4681 is placed in micropower shutdown.
When ON is selected, the LM4681 is fully operational.

Use the program’s

MUTE

section to mute the amplifier’s

output (Class D and AB headphone simultaneously). Mute
ON mutes the amplifier outputs. Mute OFF unmutes the
amplifier outputs and returns the output signal level to that
set by the VOLUME CONTROL.

The last section of the software’s interface is the

ADDRESS

BIT

. This bit can be set to 1 or 0. The software will force the

I

2

C interface board to apply a logic low or logic high to the

LM4681’s ADR pin according to the radio button that is
selected. The LM4681 will respond to either of the ad-
dresses selected in the software’s Address Bit control.

PCB Layout Guidelines

This section provides general practical guidelines for PCB
layouts that use various power and ground traces. Designers
should note that these are only "rule-of-thumb" recommen-
dations and the actual results are predicated on the final
layout.

POWER AND GROUND CIRCUITS

Star trace routing techniques (returning individual traces
back to a central point rather than daisy chaining traces
together in a serial manner) can have a major positive im-
pact on low-level signal performance. Star trace routing re-
fers to using individual traces that radiate from a signal point
to feed power and ground to each circuit or even device. This
technique may require greater design time, but should not
increase the final price of the board.

AVOIDING TYPICAL DESIGN/LAYOUT PROBLEMS

Avoid ground loops or running digital and analog traces
parallel to each other (side-by-side) on the same PCB layer.
When traces must cross over each other, do so at 90 de-
grees. Running digital and analog traces at 90 degrees to
each other from the top to the bottom side as much as
possible will minimize capacitive noise coupling and
crosstalk.

AN-1488

www.national.com

5

Summary of Contents for LM4681

Page 1: ...l to jumpers JP4 and JP2 Apply the source s signal and ground to the IN1 pin and the GND pin respectively Connect a load 8Ω between the pins on JP5 and another load between the pins on JP3 Apply power Make measurements Plug in a pair of head phones Enjoy Introduction To help the user investigate and evaluate the LM4681 s performance and capabilities a fully populated demonstra tion board is availa...

Page 2: ...area The LM4681 features a shutdown mode for micropower dissipation an internal thermal shutdown protection mecha nism and output stage fault detect and current limit protec tion Operating Conditions Temperature Range 40 C TA 85 C Amplifier Power Supply Voltage 9 0V VDD 15 5V Board Features The LM4681 demonstration board has all of the necessary connections using 100mil headers to apply the power ...

Page 3: ...Schematic Continued 20195908 Figure 2 The LM4681 Demonstration Board Schematic AN 1488 www national com 3 ...

Page 4: ...age is used connect this supply s positive voltage source to the JP6 pin labeled I2CVDD and the supply s ground source to the pin labeled GND If no external supply is used leave this jumper s pins unconnected JP7 This header is used for the I2 C signal inputs JP7 pin 1 is for an I2 CVDD that is generated by the I2 C signal source JP7 pin 2 is for the SCL signal JP7 pin 3 is for GND JP7 pin 4 is fo...

Page 5: ... can be set to 1 or 0 The software will force the I2 C interface board to apply a logic low or logic high to the LM4681 s ADR pin according to the radio button that is selected The LM4681 will respond to either of the ad dresses selected in the software s Address Bit control PCB Layout Guidelines This section provides general practical guidelines for PCB layouts that use various power and ground t...

Page 6: ...CC2013 0805 Surface Mount 1 0µF 50V Ceramic C14 Capacitor CC2013 0805 Surface Mount 1 0µF 50V Ceramic C15 Capacitor CC2013 0805 Surface Mount 1µF 50V Ceramic C16 Capacitor CC2013 0805 Surface Mount 0 1µF 50V Ceramic C17 Capacitor CC2013 0805 Surface Mount 270nF 50V Ceramic C18 Capacitor CC2013 0805 Surface Mount 270nF 50V Ceramic C19 Capacitor CC2013 0805 Surface Mount 270nF 50V Ceramic C20 Capaci...

Page 7: ...ration board Figure 4 is the silkscreen that shows parts location Figure 5 is the top layer Figure 6 is the upper inner layer Figure 7 is the lower inner layer Figure 8 is the bottom layer 20195909 Figure 4 Top Silkscreen Shown 2 6X actual size 20195910 Figure 5 Top Layer Shown 2 6X actual size AN 1488 www national com 7 ...

Page 8: ...Demonstration Board PCB Layout Continued 20195911 Figure 6 Upper Middle Layer Shown 2 6X actual size 20195912 Figure 7 Lower Middle Layer Shown 2 6X actual size AN 1488 www national com 8 ...

Page 9: ...Demonstration Board PCB Layout Continued 20195913 Figure 8 Bottom Layer Shown 2 6X actual size AN 1488 www national com 9 ...

Page 10: ... mode THD N versus Frequency performance curves at VDD 12V are shown in Figure 11 and Figure 12 respectively 20195914 RL 8Ω fIN 1kHz VDD 12V Figure 9 Class D Amplifier THD N vs Output Power 20195915 RL 32Ω fIN 1kHz VDD 12V Figure 10 Class AB Headphone Amplifier THD N vs Output Power 20195916 RL 8Ω fIN 1kHz VDD 12V PO 1W Figure 11 Class D Amplifier HD N vs Frequency 20195917 RL 32Ω fIN 1kHz VDD 12V...

Page 11: ...in the two internal I2 C control registers Table A1 LM4681 I2 C SPI Control Register Addressing and Data Format Chart B7 B6 B5 B4 B3 B2 B1 B0 I2 C Address 1 1 0 1 1 0 ADR 0 Mode Control Register 0 X 0 X X X 0 Mute Active 0 Shutdown Active Volume Control Register See Table 4 1 0 0 V4 V3 V2 V1 V0 AN 1488 www national com 11 ...

Page 12: ... 1 0 0 0 25 94 9 03 0 1 0 0 1 22 94 6 03 0 1 0 1 0 20 94 4 03 0 1 0 1 1 18 94 2 03 0 1 1 0 0 16 94 0 03 0 1 1 0 1 14 94 1 97 0 1 1 1 0 12 94 3 97 0 1 1 1 1 10 94 5 97 1 0 0 0 0 8 94 7 97 1 0 0 0 1 6 94 9 97 1 0 0 1 0 4 94 11 97 1 0 0 1 1 2 94 13 97 1 0 1 0 0 0 94 15 97 1 0 1 0 1 1 06 17 97 1 0 1 1 0 3 06 19 97 1 0 1 1 1 6 06 22 97 1 1 0 0 0 7 07 23 97 1 1 0 0 1 8 06 24 97 1 1 0 1 0 9 06 25 97 1 1 ...

Page 13: ...user 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness BANNED SUBSTANCE COMPLIANCE National Semiconductor follows the provisions of the Product Stewardship Guide for Customers CSP 9 111C2 and Banned Substances and Materials ...

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