National Semiconductor DS25CP104, User Manual

Page: 7 / 36

DS25CP104EVK User Manual
S21 S20 Input Selected
0 0 IN0
0 1 IN1
1 0 IN2
1 1 IN3
Table 3. Input Select Pins Configuration for the Output OUT2
S31 S30 Input Selected
0 0 IN0
0 1 IN1
1 0 IN2
1 1 IN3
Table 4. Input Select Pins Configuration for the Output OUT3
Signal Conditioning Tables
Output OUTn, n={0,1,2,3}
Pre-Emphasis Control Pin (PEn) State Pre-Emphasis Level
0 Off
1 Medium
Table 5. Transmit Pre-emphasis Truth Table
Input INn, n={0,1,2,3}
Equalization Control Pin (EQn) State Equalization Level
0 Off
1 Low
Table 6. Receive Equalization Truth Table
Stripline Length Table (also known as Test Channels)
Stripline Length Loss (dB) @ 1250 MHz
L1 15” (38.1cm) -3.6
L2 30” (76.2cm) -8.2
L3 60” (152.4cm) -14.5
Table 7. Stripline length table
Page 7 of 17