National Semiconductor ADC08200, Instruction Manual

Page: 11 / 16

Figure 2b. ADC 08200 Evaluation Board Clock source
C10
1uF
4
6
1
3
2
C4
1uF
-5.2V
R6
22
R10
240
R8
22
C2
1uF
R3
47
R2
330
R1
330
Q1
NTE65
Q2
NTE65
+5VA
C3
1uF
R5
33
R7
33
+3VCC
ADC_CLK
U1B
MC10H131FN
U1A
MC10H131FN
R25
510
-5.2V
R29
510
-5.2V
-5.2V
-5.2V
R23
47
R19
47
R28
510
-5.2V
-5.2V +5V
C9
1uF
C7
1uF C8
1uF
OUT
__
IN
IN
18
19
17
10
12
U2A
MC10H125FN
U2B
MC10H125FN
U2C
MC10H125FN
U2D
MC10H125FN
R22
47
R18
47
C6
1uF
R27
510
-5.2V
C1
1uF
R20
47
100MHz
R21
47
_______
100MHz
T1
T4-6T
19
18
13
12
14
D
CC
__
CE
VCC S
Q
_
Q
R
VEE
15 20
17 10
3
4
9
12
8
D
CC
__
CE
VCC
S
Q
_
Q
R
VEE
7 2
5 10
R14
47
OUT
__
IN
IN
8
9
7
R26
510
R17
47
JP1
ADCCLk
Y1
200MHz
-5.2V
R11
330
C5
1uF
OUT
__
IN
IN
3
4
5
2
20
R15
47
OUT
__
IN
IN
13
14
15
R13
330
R12
47
14
8
1
7
osc
D
GND
Vcc
OUT
JP2
MEM
1 2 3
1 2 3
R16
47
2MEM 1MEM
-5.2V +5V
R4
1K R9
2.2K
R24
4.7K
MCREST
TP4
GND
TP5
GND
1
1
h
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