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7-23
Measurements Using Two Pulse Encoders
The counter supports two pulse encoders that have two channels—channels A and B.
The counter increments on each rising edge of channel A. The counter decrements on each rising
edge of channel B, as shown in Figure 7-22.
Figure 7-22.
Measurements Using Two Pulse Encoders
For information about connecting counter signals, refer to the
section.
Buffered (Sample Clock) Position Measurement
With buffered position measurement (position measurement using a sample clock), the counter
increments based on the encoding used after the counter is armed. The value of the counter is
sampled on each active edge of a sample clock. A DMA controller transfers the sampled values
to host memory. The count values returned are the cumulative counts since the counter armed
event; that is, the sample clock does not reset the counter. You can route the counter sample
clock to the Gate input of the counter. You can configure the counter to sample on the rising or
falling edge of the sample clock.
Figure 7-23 shows an example of a buffered X1 position measurement.
Figure 7-23.
Buffered Position Measurement
Ch A
Ch B
Co
u
nter V
a
l
u
e
2
3
5
4
3
4
4
1
3
1
Ch A
Ch B
3
1
0
2
4
Co
u
nt
B
u
ffer
Sa
mple Clock
(
Sa
mple on Ri
s
ing Edge)
Co
u
nter
Armed
Summary of Contents for PCIe-6323
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