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Chapter 4
Analog Input
AI Convert Clock Timebase Signal
The AI Convert Clock Timebase (ai/ConvertClockTimebase) signal is divided down to provide
one of the possible sources for AI Convert Clock. Use one of the following signals as the source
of AI Convert Clock Timebase:
•
AI Sample Clock Timebase
•
100 MHz Timebase
AI Convert Clock Timebase is not available as an output on the I/O connector.
AI Hold Complete Event Signal
The AI Hold Complete Event (ai/HoldCompleteEvent) signal generates a pulse after each A/D
conversion begins. You can route AI Hold Complete Event out to any PFI <0..15>, RTSI <0..7>,
or PXIe_DSTARC terminal.
The polarity of AI Hold Complete Event is software-selectable, but is typically configured so
that a low-to-high leading edge can clock external AI multiplexers indicating when the input
signal has been sampled and can be removed.
AI Start Trigger Signal
Use the AI Start Trigger (ai/StartTrigger) signal to begin a measurement acquisition. A
measurement acquisition consists of one or more samples. If you do not use triggers, begin a
measurement with a software command. Once the acquisition begins, configure the acquisition
to stop:
•
When a certain number of points are sampled (in finite mode)
•
After a hardware reference trigger (in finite mode)
•
With a software command (in continuous mode)
An acquisition that uses a start trigger (but not a reference trigger) is sometimes referred to as a
posttriggered acquisition.
Retriggerable Analog Input
The AI Start Trigger is also configurable as retriggerable. The timing engine generates the
sample and convert clocks for the configured acquisition in response to each pulse on an AI Start
Trigger signal.
Summary of Contents for PCIe-6323
Page 1: ...PCIe 6323...