Glossary
©
National Instruments Corporation
G-15
PCI-4451/4452/4453/4454 User Manual
TRIG1 (EXT_TRIG)
trigger 1 signal
TRIG2 (PRETRIG)
trigger 2 signal
trigger
any event that causes or starts some form of data capture
tri-state
logic circuitry designed to have three possible outputs—0, 1, and hi-Z. The
hi-Z (high impedance) state effectively pulls the output out of its circuit,
and can be used to simplify bus communication by wire-ANDing tri-state
inputs.
TTL
transistor-transistor logic
TTL-compatible
operating in a nominal range of 0 to 5 VDC, with a signal below 1 V a logic
low, and a signal above 2.4 V a logic high
two’s complement
format
a system for digitally encoding sound that stores the amplitude values as a
signed number, with silence represented by a sample with a value of 0. For
example, with 8-bit sound samples, two's complement values would range
from –128 to 127, with 0 meaning silence. See offset-binary format.
U
undersampling
sampling at a rate lower than the Nyquist frequency—can cause aliasing
update
the output equivalent of a scan. One or more analog or digital output
samples. Typically, the number of output samples in an update is equal to
the number of channels in the output group. For example, one pulse from
the update clock produces one update which sends one new sample to every
analog output channel in the group.
UPDATE*
update signal
update rate
the number of output updates per second
V
V
volts
V
cc
collector common voltage—power supply voltage
V
in
volts in