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Chapter 3

Calibration

NI PXI-7831R User Manual

3-2

ni.com

onboard voltage reference. The offset and gain errors in the analog circuitry
are calibrated out by adjusting the CalDACs to minimize these errors.

Immediately after internal calibration, the only significant residual
calibration error should be gain error due to time and temperature drift of
the onboard voltage reference. This error is addressed by external
calibration, which is discussed in the

External Calibration

section. If you

are interested primarily in relative measurements, you can ignore a small
amount of gain error, and self-calibration should be sufficient.

The results of an internal calibration can be stored in the flash memory on
the NI PXI-7831R so that the CalDACs are automatically loaded with the
newly calculated calibration constants the next time the NI PXI-7831R is
powered on.

External Calibration

The NI PXI-7831R has an onboard calibration reference to ensure the
accuracy of self-calibration. Its specifications are listed in Appendix A,

Specifications

. The reference voltage is measured at the factory and stored

in the flash memory for subsequent internal calibrations. This voltage is
stable enough for most applications, but if you are using your device at an
extreme temperature or if the onboard reference has not been measured for
a year or more, you may want to externally calibrate your device.

An external calibration refers to calibrating your device with a known
external reference rather than relying on the onboard reference. During the
external calibration process, the onboard reference value is re-calculated.
This compensates for any time or temperature drift related errors in the
onboard reference, which may have resulted since the last calibration. You
can save the results of the external calibration process to flash memory so
that the new calibration constants are automatically loaded the next time the
NI PXI-7831R is powered on and so that the newly measured onboard
reference level is used for subsequent internal calibrations.

To externally calibrate your device, be sure to use a very accurate external
reference. The reference should be several times more accurate than the
device itself.

For a detailed calibration procedure for the NI PXI-7831R, refer to the

NI PXI-7831R Calibration Procedure

by clicking

Manual Calibration

Procedures

at

ni.com/calibration

.

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Summary of Contents for NI PXI-7831R

Page 1: ...Reconfigurable I O NI PXI 7831R User Manual Reconfigurable I O Devices for PXI CompactPCI Bus Computers NI PXI 7831R User Manual April 2003 Edition Part Number 370489A 01 ...

Page 2: ...4 24 Germany 49 0 89 741 31 30 Greece 30 2 10 42 96 427 Hong Kong 2645 3186 India 91 80 51190000 Israel 972 0 3 6393737 Italy 39 02 413091 Japan 81 3 5472 2970 Korea 82 02 3451 3400 Malaysia 603 9059 6711 Mexico 001 800 010 0793 Netherlands 31 0 348 433 466 New Zealand 64 09 914 0488 Norway 47 0 32 27 73 00 Poland 48 0 22 3390 150 Portugal 351 210 311 210 Russia 7 095 238 7139 Singapore 65 6 226 5...

Page 3: ...n operation or maintenance instructions owner s modification of the product owner s abuse misuse or negligent acts and power failure or surges fire flood accident actions of third parties or other events outside reasonable control Copyright Under the copyright laws this publication may not be reproduced or transmitted in any form electronic or mechanical including photocopying recording storing in...

Page 4: ...C Rules Class A Federal Communications Commission This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment This equipment generates uses and can radiate radio frequency energy a...

Page 5: ...Concept 1 5 Flexible Functionality 1 5 User Defined I O Resources 1 6 Device Embedded Logic and Processing 1 6 Reconfigurable I O Architecture 1 6 Reconfigurable I O Applications 1 8 Software Development 1 8 FPGA Module 1 9 RT Module 1 9 Cables and Optional Equipment 1 9 Custom Cabling 1 10 Unpacking 1 11 Safety Information 1 11 Chapter 2 Hardware Overview of the NI PXI 7831R Analog Input 2 2 Inpu...

Page 6: ...ode 2 12 Common Mode Signal Rejection Considerations 2 13 Analog Output 2 14 Connecting Analog Output Signals 2 14 Digital I O 2 15 Connecting Digital I O Signals 2 15 PXI Trigger Bus 2 18 PXI Local Bus 2 19 Switch Settings 2 20 Power Connections 2 21 Field Wiring Considerations 2 21 Chapter 3 Calibration Loading Calibration Constants 3 1 Internal Calibration 3 1 External Calibration 3 2 Appendix ...

Page 7: ...ou to pull down the File menu select the Page Setup item and select Options from the last dialog box This icon denotes a note which alerts you to important information This icon denotes a caution which advises you of precautions to take to avoid injury data loss or a system crash When this symbol is marked on the device refer to the Safety Information section of Chapter 1 Introduction for precauti...

Page 8: ... PXI 7831R User Manual This manual contains detailed information about the NI PXI 7831R hardware LabVIEW FPGA Module Release Notes This document contains information about installing and getting started with the FPGA Module LabVIEW FPGA Module User Manual This manual describes how to use the FPGA Module LabVIEW Help This help contains information about using various virtual instruments VIs with th...

Page 9: ...specific integrated circuit ASIC You can change the functionality of the FPGA on the RIO device by using LabVIEW a graphical programming environment and the LabVIEW FPGA Module to create and download a custom virtual instrument VI to the FPGA You can reconfigure the RIO device with a new VI at any time Using LabVIEW you can graphically design the timing and functionality of the RIO device without ...

Page 10: ...ctions For example the RTSI bus on the RIO device is available in a PXI chassis but not in a CompactPCI chassis The CompactPCI specification permits vendors to develop sub buses that coexist with the basic PCI interface on the CompactPCI bus Compatible operation is not guaranteed between CompactPCI devices with different sub buses nor between CompactPCI devices with sub buses and PXI The standard ...

Page 11: ... 7 0 or later required to develop custom FPGA VIs for the RIO device PXI CompactPCI chassis and a PXI CompactPCI embedded controller running Windows 2000 XP or any computer running Windows 2000 XP and an MXI 3 link to a PXI CompactPCI chassis At least one cable and terminal block for connecting signals to the NI PXI 7831R Table 1 1 Pins Used by the NI PXI 7831R NI PXI 7831R Signal PXI Pin Name PXI...

Page 12: ...ou need the following items NI PXI 7831R The following software packages LabVIEW version 7 0 or later NI Device Drivers CD FPGA Module version 7 0 or later required to develop custom FPGA VIs for the RIO device RT Module version 7 0 or later PXI CompactPCI chassis and real time PXI controller One of the following host computers depending upon your application running Windows 2000 XP PC Laptop comp...

Page 13: ... to better match the requirements of the measurement and control system The behavior can be fully user defined and implemented as a VI creating an application specific I O device In contrast a traditional data acquisition DAQ device uses a fixed core with predetermined functionality Flexible Functionality Flexible functionality allows the RIO device to match individual application requirements and...

Page 14: ...ng in the FPGA of the RIO device Typical logic functions include Boolean operations comparisons and basic mathematical operations You can implement multiple functions efficiently in the same design operating sequentially or in parallel It is possible to implement more complex algorithms such as control loops but the size of the FPGA limits the scope of these algorithms Reconfigurable I O Architect...

Page 15: ...aining FPGA logic is available for higher level functions such as timing triggering and counting Each of these functions consumes varying amounts of logic For example a typical 32 bit counter consumes 20 times more logic than a DIO resource while an 8 bit counter consumes five times more logic than a DIO resource Figures 1 2 and 1 3 illustrate the logic used by the FPGA in two different applicatio...

Page 16: ...nd load the FPGA Refer to the LabVIEW FPGA User Manual for more information about how to store your VI in flash memory Reconfigurable I O Applications To create or obtain new VIs for your application you can use the FPGA Module which allows the application to be specified using a subset of LabVIEW Arbitrary functionality can be defined for the RIO device If you are using the FPGA Module refer to t...

Page 17: ...e FPGA by programmatically reading and writing to the device Note A software utility installed with the NI RIO Device Drivers CD allows users without the FPGA module to configure the NI PXI 7831R analog input mode synchronize to the PXI clock and configure the device to automatically load FPGA VIs when powered on RT Module The RT Module extends the LabVIEW development environment to deliver determ...

Page 18: ...tandard 68 pin screw terminal blocks SCB 68 CB 68LP CB 68LPR TBX 68 NSC68 262650 Non shielded cable connects from 68 pin VHDCI male connector to two 26 pin female headers plus one 50 pin female header The pinout of these headers allows for direct connection to 5B backplanes for analog signal conditioning and SSR backplanes for digital signal conditioning 26 pin headers can connect to the following...

Page 19: ...osed pins of connectors To avoid such damage in handling the device take the following precautions Ground yourself using a grounding strap or by holding a grounded object Touch the antistatic package to a metal part of the computer chassis before removing the device from the package Remove the device from the package and inspect the device for loose components or any sign of damage Notify NI if th...

Page 20: ...lution has no influence Pollution Degree 2 means that only nonconductive pollution occurs in most cases Occasionally however a temporary conductivity caused by condensation must be expected Pollution Degree 3 means that conductive pollution occurs or dry nonconductive pollution occurs that becomes conductive due to condensation You must insulate signal connections for the maximum voltage for which...

Page 21: ... provided by a standard wall outlet for example 115 V for U S or 230 V for Europe Examples of Installation Category II are measurements performed on household appliances portable tools and similar products Installation Category III is for measurements performed in the building installation at the distribution level This category refers to measurements on hard wired equipment such as equipment in f...

Page 22: ...1R Figure 2 1 NI PXI 7831R Block Diagram Calibration Mux Address Data Control AI AI PXI CompactPCI Bus Calibration DACs 16 Bit ADC Input Mux Instrumentation Amplifier Input Mode Mux AISENSE AIGND 16 Bit DAC Calibration DACs x8 Channels 2 x8 Channels Voltage Reference Temperature Sensor Configuration Control Configuration Flash Memory User Configurable FPGA on RIO Devices Bus Interface Connector 0 ...

Page 23: ...sly sampled or sampled at different rates The input mode is software configurable and the input range is fixed at 10 V The converters return data in two s complement format Table 2 1 shows the ideal output code returned for a given AI voltage Table 2 1 Ideal Output Code and AI Voltage Mapping Input Description AI Voltage Output Code Hex Two s Complement Full scale range 1 LSB 9 999695 7FFF Full sc...

Page 24: ...l uses two AI lines The positive input pin connects to the positive terminal of the onboard instrumentation amplifier and the negative input pin connects to the negative input of the instrumentation amplifier RSE When the NI PXI 7831R is configured in RSE input mode each channel uses only its positive AI pin This pin connects to the positive terminal of the onboard instrumentation amplifier The ne...

Page 25: ...e AISENSE signal is connected internally to the negative input of the instrumentation amplifier for each channel In DIFF and RSE input modes AISENSE is not used and can be left unconnected Caution Exceeding the differential and common mode input ranges distorts the input signals Exceeding the maximum input voltage rating can damage the NI PXI 7831R and the computer NI is not liable for any damage ...

Page 26: ...s this output voltage when it performs A D conversions You must reference all signals to ground either at the source device or at the NI PXI 7831R If you have a floating source you should reference the signal to ground by using RSE input mode or the DIFF input mode with bias resistors Refer to the Differential Connections for Nonreferenced or Floating Signal Sources section for more information ab...

Page 27: ... therefore already connected to a common ground point with respect to the NI PXI 7831R assuming that the computer is plugged into the same power system Nonisolated outputs of instruments and devices that plug into the building power system fall into this category The difference in ground potential between two instruments connected to the same building power system is typically between 1 and 100 mV...

Page 28: ...und loop losses Vg are added to measured signal NOT RECOMMENDED V1 AI i AI i AIGND i V1 AI i AI i AIGND i See text for information on bias resistors Signal Source Type Floating Signal Source Not Connected to Building Ground Grounded Signal Source Examples Ungrounded Thermocouples Signal Conditioning with Isolated Outputs Battery Devices Examples Plug in Instruments with Nonisolated Outputs Input D...

Page 29: ...ial input connections for any channel that meets any of the following conditions The input signal is low level less than 1 V The leads connecting the signal to the NI PXI 7831R are greater than 3 m 10 ft The input signal requires a separate ground reference point or return signal The signal leads travel through noisy environments Differential signal connections reduce noise pickup and increase com...

Page 30: ...ise pickup in the leads connecting the signal sources to the device The instrumentation amplifier can reject common mode signals as long as V in and V in input signals are both within their specified input ranges Refer to Appendix A Specifications for more information about input ranges Differential Connections for Nonreferenced or Floating Signal Sources Figure 2 6 shows how to connect a floating...

Page 31: ...for DC coupled sources with low source impedance less than 100 Ω However for larger source impedances this connection leaves the differential signal path significantly out of balance Noise that couples electrostatically onto the positive line does not couple onto the negative line because it is connected to ground Hence this noise appears as a differential mode signal instead of a common mode sign...

Page 32: ...of input bias current typically 100 kΩ to 1 MΩ In this case you can tie the negative input directly to AIGND If the source has high output impedance you should balance the signal path as previously described using the same value resistor on both the positive and negative inputs you should be aware that there is some gain error from loading down the source Single Ended Connection Considerations A s...

Page 33: ...nal conductors Electrical coupling is a function of how much the electric field differs between the two conductors Single Ended Connections for Floating Signal Sources RSE Input Mode Figure 2 7 shows how to connect a floating signal source to a channel on the NI PXI 7831R configured for RSE input mode Figure 2 7 Single Ended Input Connections for Nonreferenced or Floating Signals Single Ended Conn...

Page 34: ...igure 2 8 shows how to connect a grounded signal source to a channel on the NI PXI 7831R configured for NRSE input mode Figure 2 8 Single Ended Input Connections for Ground Referenced Signals Common Mode Signal Rejection Considerations Figures 2 5 and 2 8 show connections for signal sources that are already referenced to some ground point with respect to the NI PXI 7831R In these cases the instrum...

Page 35: ...ata written to the DAC is interpreted in two s complement format Table 2 3 shows the ideal AO voltage generated for a given input code Note If the output value for an AO channel is not specifically set by your VI then the AO channel voltage output will be undefined Connecting Analog Output Signals The AO signals are AO 0 7 and AOGND AO 0 7 are the eight available AO channels AOGND is the ground re...

Page 36: ...nnector are DGND and DIO 0 15 The DIO signals on the NI PXI 7831R DIO connector are DGND and DIO 0 39 DIO 0 n are the signals making up the DIO port and DGND is the ground reference signal for the DIO port The NI PXI 7831R has one MIO and two DIO connectors for a total of 96 DIO lines Refer to Figure B 1 NI PXI 7831R Connector Locations and Figure B 2 NI PXI 7831R I O Connector Pin Assignments for...

Page 37: ...from such signal connections Do not short the DIO lines of the NI PXI 7831R directly to power or to ground Doing so can damage the NI PXI 7831R by causing excessive current to flow through the DIO lines Refer to Appendix A Specifications for more information NI is not liable for any damage resulting from such signal connections If required by your application you can connect multiple NI PXI 7831R ...

Page 38: ...ital output applications include sending TTL or LVCMOS signals and driving external devices such as the LED shown in the figure The NI PXI 7831R SH68 C68 S shielded cable contains 34 twisted pairs of conductors To maximize the digital I O available on the NI PXI 7831R some of the DIO lines are twisted with power or ground as they are run through the cable and some DIO lines are twisted with other ...

Page 39: ...at supports PXI triggers The PXI trigger lines on the NI PXI 7831R are PXI TRIG 0 7 In addition the NI PXI 7831R can use the PXI star trigger line to send or receive triggers from a device plugged into slot 2 of the PXI chassis The PXI star trigger line on the NI PXI 7831R is PXI STAR The PXI 7831R can configure each PXI trigger line either as an input or an output signal Since each PXI trigger li...

Page 40: ...cal bus left lines on the NI PXI 7831R are PXI LBLSTAR 0 12 The NI PXI 7831R can configure each PXI local bus line either as an input or an output signal Only one device can drive the same physical local bus line at a given time For example if an NI PXI 7831R is configured to drive a signal on PXI LBR 0 the device in the slot immediately to the right must have its PXI LBLSTAR 0 line configured as ...

Page 41: ...Refer to Figure 2 2 for the location of switch SW1 For normal operation switch 1 is in the OFF position To prevent a VI stored in flash memory from loading to the FPGA upon power up you can move switch 1 to the ON position as shown in Figure 2 11 Figure 2 11 Switch Settings on Switch SW1 To move switch 1 to the ON position complete the following steps 1 Power off and unplug the PXI CompactPCI chas...

Page 42: ...V lines on the device Caution Do not connect the 5 V power pins directly to analog or digital ground or to any other voltage source on the NI PXI 7831R or any other device under any circumstance Doing so can damage the NI PXI 7831R and the computer NI is not liable for damage resulting from such a connection Field Wiring Considerations Environmental noise can seriously affect the accuracy of measu...

Page 43: ...es from high current or high voltage lines These lines can induce currents in or voltages on the NI PXI 7831R signal lines if they run in parallel paths at a close distance To reduce the magnetic coupling between lines separate them by a reasonable distance if they run in parallel or run the lines at right angles to each other Do not run signal lines through conduits that also contain power lines ...

Page 44: ...ed before shipment at approximately 25 C to the levels indicated in Appendix A Specifications The associated calibration constants the values that were written to the CalDACs to achieve calibration in the factory are stored in the onboard nonvolatile flash memory These constants are automatically read from the flash memory and loaded into the CalDACs by the NI PXI 7831R hardware on power up This o...

Page 45: ...tory and stored in the flash memory for subsequent internal calibrations This voltage is stable enough for most applications but if you are using your device at an extreme temperature or if the onboard reference has not been measured for a year or more you may want to externally calibrate your device An external calibration refers to calibrating your device with a known external reference rather t...

Page 46: ...IFF RSE NRSE software selectable selection applies to all 8 channels Type of ADC Successive approximation Resolution 16 bits 1 in 65 536 Conversion time 4 µs Maximum sampling rate 200 kS s per channel Input impedance Powered on 10 GΩ in parallel with 100 pF Powered off 4 kΩ min Overload 4 kΩ min Input signal range 10 V Input bias current 2 nA Input offset current 1 nA Input coupling DC Maximum wor...

Page 47: ...minal Range V Absolute Accuracy Relative Accuracy of Reading Offset µV Noise Quantization µV Temp Drift C Absolute Accuracy at Full Scale mV Resolution µV Positive Full Scale Negative Full Scale 24 Hours 1 Year Single Pt Averaged Single Pt Averaged 10 0 10 0 0 0496 0 0507 2542 1779 165 0 0005 7 78 2170 217 Note Accuracies are valid for measurements following an internal calibration Measurement acc...

Page 48: ...B 20 0 V 7 5 µs 10 3 µs 40 µs 2 0 V 2 7 µs 4 1 µs 5 1 µs 0 2 V 1 7 µs 2 9 µs 3 6 µs Nominal Range V Absolute Accuracy Absolute Accuracy at Full Scale mV of Reading Offset µV Temp Drift C Positive Full Scale Negative Full Scale 24 Hours 1 Year 10 0 10 0 0 0335 0 0351 2366 0 0005 5 88 Note Accuracies are valid for analog output following an internal calibration Analog output accuracies are listed fo...

Page 49: ...e 10 V Output coupling DC Output impedance 1 25 Ω max Current drive 5 mA Protection Short circuit to ground Power on state User configurable Dynamic Characteristics Settling time Slew rate 10 V µs Noise 150 µVrms DC to 1 MHz Glitch energy at midscale transition 100 mV for 3 µs Step Size Accuracy 16 LSB 4 LSB 2 LSB 20 0 V 6 0 µs 6 2 µs 7 2 µs 2 0 V 2 2 µs 2 9 µs 3 8 µs 0 2 V 1 5 µs 2 6 µs 3 6 µs ...

Page 50: ... to 7 0 V Output Short circuit up to eight lines may be shorted at a time Reconfigurable FPGA Number of logic slices 5 120 Equivalent number of logic cells 11 520 Available embedded RAM 16 384 KB Timebase 40 MHz Level Min Max Input low voltage VIL Input high voltage VIH 0 0 V 2 0 V 0 8 V 5 5 V Output low voltage VOL where IOUT Imax sink Output high voltage VOH where IOUT Imax source 2 4 V 0 4 V Dr...

Page 51: ...stored in flash memory Temperature coefficient 5 ppm C max Long term stability 20 ppm Note To generate a calibration certificate for the NI PXI 7831R click On line Calibration Certificates at ni com calibration Bus Interface PXI Master slave Power Requirement 5 VDC 5 NI PXI 7831R 450 mA typ 700 mA max does not include current drawn from the 5 V line on the I O connectors 3 3 VDC 5 NI PXI 7831R 335...

Page 52: ...h 12 V Installation Category I Channel to channel 24 V Installation Category I Environmental Operating temperature 40 to 70 C Storage temperature 55 to 85 C Humidity 10 to 90 RH noncondensing Maximum altitude 2 000 meters Pollution Degree indoor use only 2 Safety The NI PXI 7831R devices meet the requirements of the following standards for safety and electrical equipment for measurement control an...

Page 53: ...rate this device with shielded cabling CE Compliance This product meets the essential requirements of applicable European Directives as amended for CE marking as follows Low Voltage Directive safety 73 23 EEC Electromagnetic Compatibility Directive EMC 89 336 EEC Note Refer to the Declaration of Conformity DoC for this product for any additional regulatory compliance information To obtain the DoC ...

Page 54: ...1R I O connectors The NI PXI 7831R has two DIO connectors with 40 DIO lines per connector and one MIO connector with eight AI lines eight AO lines and 16 DIO lines Figure B 1 shows the I O connector locations for the NI PXI 7831R The I O connectors are numbered starting at zero The text in parentheses indicates whether each I O connector is an MIO connector or a DIO connector ...

Page 55: ... B 2 shows the I O connector pin assignments for the I O connectors on the NI PXI 7831R The DIO connector pin assignment applies to connectors 1 2 on the NI PXI 7831R The MIO connector pin assignment applies to connector 0 on the NI PXI 7831R NI PXI 7831R CONNECTOR 0 MIO CONNECTOR 1 DIO CONNECTOR 2 DIO Reconfigurable I O ...

Page 56: ... DIO9 DIO10 DIO11 DIO12 DIO13 DIO14 DIO15 DIO16 DIO17 DIO18 DIO19 DIO20 DIO21 DIO22 DIO23 DIO24 DIO25 DIO26 DIO27 DIO29 DIO31 DIO33 DIO35 DIO37 DIO39 1 35 2 36 3 37 4 38 5 39 6 40 7 41 8 42 9 43 10 44 11 45 12 46 13 47 14 48 15 49 16 50 17 51 18 52 19 53 20 54 21 55 22 56 23 57 24 58 25 59 26 60 27 61 28 62 29 63 30 64 31 65 32 66 33 67 34 68 5V DGND DGND DGND DGND DGND DGND DGND DGND DIO8 DIO10 D...

Page 57: ...Analog Input Ground These pins are the reference point for single ended measurements in RSE configuration and the bias current return point for differential measurements All three ground references AIGND AOGND and DGND are connected together on the NI PXI 7831R AISENSE AIGND Input Analog Input Sense This pin serves as the reference node for channels AI 0 7 when the device is configured for NRSE mo...

Page 58: ...ection Impedance Input Output Protection Volts On Off Source mA at V Sink mA at V Rise Time Bias 5V DO AI 0 7 AI 10 GΩ in parallel with 100 pF 42 35 2 nA AI 0 7 AI 10 GΩ in parallel with 100 pF 42 35 2 nA AIGND AO AISENSE AI 10 GΩ in parallel with 100 pF 42 35 2 nA AO 0 7 AO 1 25 Ω Short circuit to ground 5 at 10 5 at 10 10 V µs AOGND AO DGND DO DIO 0 15 Connector 0 DIO 0 39 Connector 1 2 Default ...

Page 59: ...lugged directly into a 5B backplane for AO signal conditioning The NI PXI 7831R AO channels 0 7 are mapped to the 5B backplane channels 0 7 in sequential order The 50 pin header contains the 16 DIO lines available on the NI PXI 7831R MIO connector This header can be plugged directly into an SSR backplane for digital signal conditioning DIO lines 0 15 are mapped to the 5B backplane slots 0 15 in se...

Page 60: ...XI 7831R DIO connector These lines are mapped to slots 0 15 on an SSR backplane in sequential order You can connect to an SSR backplane containing a number channels that does not equal the number of 2 4 6 8 10 12 14 16 18 20 22 24 26 1 3 5 7 9 11 13 15 17 19 21 23 25 AO0 AOGND0 AO1 AO2 AOGND2 AO3 AO4 AOGND4 AO5 AO6 AOGND6 AO7 NC NC NC AOGND1 NC NC AOGND3 NC NC AOGND5 NC NC AOGND7 NC AO 0 7 Connect...

Page 61: ... 37 39 41 43 45 47 49 DIO23 DIO22 DIO21 DIO20 DIO19 DIO18 DIO17 DIO16 DIO15 DIO14 DIO13 DIO12 DIO11 DIO10 DIO9 DIO8 DIO7 DIO6 DIO5 DIO4 DIO3 DIO2 DIO1 DIO0 5V NC NC NC NC NC NC NC NC NC DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45...

Page 62: ...gure the SCB 68 as a general purpose connector block Refer to Figure C 1 for the general purpose switch configuration Figure C 1 General Purpose Switch Configuration for the SCB 68 Terminal Block After configuring the SCB 68 switches you can connect the I O signals to the SCB 68 screw terminals Refer to Appendix B Connecting I O Signals for the connector pin assignments for the NI PXI 7831R After ...

Page 63: ... DIO 5V 5V DGND DIO0 DGND DIO1 DGND DIO2 DGND DIO3 DGND DIO4 DGND DIO5 DGND DIO6 DGND DIO7 DIO8 DIO9 DIO10 DIO11 PIN 1 35 2 36 3 37 4 38 5 39 6 40 7 41 8 42 9 43 10 44 11 45 MIO DIO DIO12 DIO13 DIO14 DIO15 AOGND7 AO7 AOGND6 AO6 AOGND5 AO5 AOGND4 AO4 AOGND3 AO3 AOGND2 AO2 AOGND0 AO1 AOGND0 AO0 NC AISENSE MIO DIO AI0 AI0 AIGND0 AIGND1 AI1 AI1 AI2 AI2 AIGND2 AIGND3 AI3 AI3 AI4 AI4 AIGND4 AIGND5 AI5 A...

Page 64: ...asurement glossary and so on Assisted Support Options Contact NI engineers and other measurement and automation professionals by visiting ni com support Our online system helps you define your question and connects you to the experts by phone discussion forum or email Training Visit ni com custed for self paced tutorials videos and interactive CDs You also can register for instructor led hands on ...

Page 65: ...com calibration If you searched ni com and could not find the answers you need contact your local office or NI corporate headquarters Phone numbers for our worldwide offices are listed at the front of this manual You also can visit the Worldwide Offices section of ni com niglobal to access the branch office Web sites which provide up to date contact information support phone numbers email addresse...

Page 66: ... Symbol Prefix Value p pico 10 12 n nano 10 9 µ micro 10 6 m milli 10 3 k kilo 103 M mega 106 G giga 109 Numbers Symbols Degrees Greater than Greater than or equal to Less than Less than or equal to Negative of or minus Ω Ohms Per Percent Plus or minus Positive of or plus ...

Page 67: ... voltage to a digital number AI Analog input AI i Analog input channel signal AIGND Analog input ground signal AISENSE Analog input sense signal AO Analog output AO i Analog output channel signal AOGND Analog output ground signal ASIC Application Specific Integrated Circuit a proprietary semiconductor component designed and manufactured to perform a set of specific functions B bipolar A signal ran...

Page 68: ...ignal usually expressed in decibels dB common mode voltage Any voltage present at the instrumentation amplifier inputs with respect to amplifier ground CompactPCI Refers to the core specification defined by the PCI Industrial Computer Manufacturer s Group PICMG D D A Digital to analog DAC Digital to analog converter an electronic device often an integrated circuit that converts a digital number in...

Page 69: ...rom computer memory DNL Differential nonlinearity a measure in LSB of the worst case deviation of code widths from their ideal value of 1 LSB DO Digital output E EEPROM Electrically erasable programmable read only memory ROM that can be erased with an electrical signal and reprogrammed F FPGA Field programmable gate array FPGA VI A configuration that is downloaded to the FPGA and that determines t...

Page 70: ...al programming language that uses icons instead of lines of text to create programs LSB Least significant bit M m Meter max Maximum MIMO Multiple input multiple output min Minimum MIO Multifunction I O monotonicity A characteristic of a DAC in which the analog output always increases as the values of the digital code input to it increase mux Multiplexer a switching device with multiple inputs that...

Page 71: ...ect to the measurement system ground O OUT Output pin a counter output pin where the counter can generate various TTL pulse waveforms P PCI Peripheral Component Interconnect a high performance expansion bus architecture originally developed by Intel to replace ISA and EISA It is achieving widespread acceptance as a standard for PCs and work stations it offers a theoretical maximum transfer rate of...

Page 72: ...ution one part in 4 096 resolution and 0 0244 of full scale RIO Reconfigurable I O rms Root mean square RSE Referenced single ended mode all measurements are made with respect to a common reference measurement system or a ground Also called a grounded measurement system S s Seconds S Samples S s Samples per second used to express the rate at which a DAQ board samples an analog signal signal condit...

Page 73: ...on of the temperature TTL Transistor transistor logic two s complement Given a number x expressed in base 2 with n digits to the left of the radix point the base 2 number 2n x V V Volts VDC Volts direct current VHDCI Very high density cabled interconnect VI Virtual instrument program in LabVIEW that models the appearance and function of a physical instrument VIH Volts input high VIL Volts input lo...

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