© National Instruments
|
3-19
Figure 3-9.
Asynchronous Routing Operation
Some delay is always associated with an asynchronous route, and this delay varies among
NI PXI-665
x
modules, depending on variations in temperature and chassis voltage. Typical
delay times in the NI PXI-665
x
for asynchronous routes between various sources and
destinations are given in Appendix A,
.
Asynchronous routing works well if the total system delays are not too long for the application.
Propagation delay could be caused by the following reasons:
•
Output delay on the source
•
Propagation delay of the signal across the backplane(s) and cable(s)
•
Propagation delay of the signal through the NI PXI-665
x
•
Time for the receiver to recognize the signal
Both the source and the destination of an asynchronous routing operation on the NI PXI-665
x
can be any of the following lines:
•
Any front panel PFI pin (PFI <0..5)
•
Any PXI star trigger line (PXI_STAR <0..12>)
•
Any PXI/RTSI trigger line (PXI_TRIG <0..7>)
Synchronous Routing
A synchronous routing operation is defined in terms of three signals: a source, a destination, and
a synchronization clock. Unlike asynchronous routing, the output of a synchronous routing
operation does not directly follow the input after a propagation delay. Instead, the logic state of
the input is sampled on each active edge of the synchronization clock and the output is set to that
logic state after a small delay, as shown in Figure 3-10. Thus, the output is said to be
synchronous
with this clock.
The NI PXI-665
x
boards support routing synchronous to either the rising or falling edge of the
synchronization clock. In addition, the polarity of the destination signal can be inverted, which
is useful when handling active-low digital signals.
Trigger Inp
u
t
Trigger O
u
tp
u
t
Prop
a
g
a
tion Del
a
y
t
pd
