© National Instruments
|
3-13
Figures 3-6 and 3-7 summarize the routing features of the NI PXI-6653 and NI PXI-6652.
The remainder of this chapter details the capabilities and constraints of the routing architecture.
Figure 3-6.
High-Level Schematic of NI PXI-6653 and NI PXI-6652
Signal Routing Architecture
Figure 3-7 provides a more detailed view of the
Selection Circuitry
referenced in Figure 3-6.
Figure 3-7.
Signal Selection Circuitry Diagram
PFI 0
DD
S
PXI_CLK10
PFI 0
DD
S
PXI_CLK10
÷2
N
÷2
M
÷2
N
÷2
M
S
election
Circ
u
itry
S
election
Circ
u
itry
S
election
Circ
u
itry
S
election
Circ
u
itry
S
election
Circ
u
itry
S
election
Circ
u
itry
S
election
Circ
u
itry
S
election
Circ
u
itry
S
election
Circ
u
itry
PFI 0
PFI 1
PFI 5
PXI_
S
TAR 0
PXI_
S
TAR 1
PXI_
S
TAR 12
PXI_TRIG 0
PXI_TRIG 1
PXI_TRIG 7
3
S
YNCHRONIZATION
CLOCK
S
for PFI<0..5>
2
8
S
OURCE
S
*
3
*
PXI_
S
TAR<0..12>,
PXI_TRIG<0..7>,
PFI<0..5>,
a
nd
S
oftw
a
re Trigger
a
re
v
a
lid
S
OURCE
S
of e
a
ch
S
election
Circ
u
itry
b
lock.
For PXI_
S
TAR, CLKIN
i
s
a
l
s
o
a
v
a
lid
s
o
u
rce.
S
YNCHRONIZATION
CLOCK
S
for
PXI_
S
TAR<0..12>
a
nd
PXI_TRIG<0..7>
PFI<0..5>
PXI_TRIG<0..7>
PXI_
S
TAR<0..12>
S
oftw
a
re Trigger
GND
CLK
CLK/2
N
CLK/2
M
S
YNCHR
ONIZA
TION
CLOCK
S
S
OURCE
DE
S
TINA
TION
CLKIN
(PXI_
S
TAR only)
