Index
I-8
www.ni.com
Memory Select, 6-4
Shared RAM Pool, 6-4
VXI/VME Shared RAM Size, 6-4
VXI/VME-MXI-2 Configuration Editor
A16 and A24/A32 Write Posting, 6-12
Address Space and Requested
default settings (table), 1-13
Interlocked Mode, 6-12
LA Selection and Logical Address, 6-11
MXI bus configuration options
advanced MXI settings, 6-17
CLK10, 6-19
MXI Auto Retry, 6-17
MXI BTO Value, 6-17
MXIbus System Controller, 6-17
Transfer Limit, 6-18
overview, 6-10
VXI/VME bus configuration
Arbiter Timeout, 6-16
Arbiter Type, 6-15
Fair Requester, 6-16
Request Level, 6-16
Transfer Limit, 6-15
VMEbus System Controller, 6-14
VXI/VME Auto Retry, 6-15
VXI/VME Bus Timeout Value, 6-14
VXI/VME-PCI8026 kit
hardware description, 1-4
introduction, 1-1
MXI-2 description, 1-3
overview, 1-3
requirements for getting started, 1-3
software description, 1-5
CLK10 generation (figure), 3-9
SMB CLK10 settings (figure), 3-9, 3-11
VXIbus local bus, 3-7
VXIbus logical address, 3-3
See also logical address.
VXIbus Slot 0/non-Slot 0, 3-5
VXIedit configuration utility
vxiinreg command, 1-9
VXILINUX symbol, defining, 7-4
VXImemAlloc function (caution), 7-3
VXI-MXI-2 module, 3-1
common questions, D-1
configuration, 3-1
CLK10 routing, 3-8
configuration EEPROM, 3-15
front panel features, 3-3
MXIbus termination, 3-13
onboard DRAM
removing metal enclosure, 3-3
right-side cover (figure), 3-2
trigger input termination, 3-12
VXIbus CLK10 routing
CLK10 generation (figure), 3-9
SMB CLK10 settings
VXIbus local bus, 3-7
VXIbus logical address, 3-3
connecting MXIbus cable, 3-19
default settings
hardware settings (table), 1-12
