National Instruments DAQ AT-MIO-16X, User Manual, Page: 184 / 330

Chapter 5 Programming
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National Instruments Corporation 5-15 AT-MIO-16X User Manual
Programming Single-Analog Input Channel Configurations
The analog input channel, gain, mode, and range for single conversion
and single channel acquisition are selected by writing a single
configuration value to the CONFIGMEM Register. This register
offers a window into the channel configuration memory. The
CONFIGMEMLD Register must then be strobed to load this channel
configuration information. See the CONFIGMEM Register bit
description earlier in this chapter for analog input channel and
configuration bit patterns. Set up the bits as given in the CONFIGMEM
Register bit description and write to the CONFIGMEM Register.
Remember that the channel configuration memory must be first
initialized with an access to the CONFIGMEMCLR Register.
Once the channel configuration memory is configured, it needs to be
written to only when the analog input channel or configuration settings
need to be changed.
Programming Multiple-Analog Input Channel Configurations
During a scanning data acquisition operation, a selected number of
locations in the channel configuration memory are sequenced through
by the acquisition circuitry. A new channel configuration value is
selected after each A/D conversion. The first conversion is performed
on the first channel setting in the memory. The second conversion is
performed on the second channel and gain setting, and so on. The last
entry written to the channel configuration memory must have the
CHAN_LAST bit set. This bit marks the end of the scan sequence. After
the last conversion is performed, the scan sequence starts over. If
there are N entries in the channel configuration memory, every Nth
conversion in the data collected is performed on the same channel,
gain, mode, and range setting.
Multiple conversions can be performed on each entry in the channel
configuration memory before incrementing to the next entry in the scan
sequence. If the SCANDIV bit in Command Register 1 is set, the
channel configuration memory increments to the next entry when an
active low pulse is detected on the Am9513A Counter/Timer OUT1
signal. If the SCANDIV bit is cleared, the channel configuration
memory is incremented to the next entry after every conversion.
The channel configuration memory must be loaded with the desired
scan sequence before data acquisition begins. To load the channel