Figure 77. Retriggerable Single Pulse Generation with Initial Delay on Retrigger
SOURCE
GATE
(Start Trigger)
OUT
5
3
5
3
Counter
Load Values
4 3 2 1 0 2 1 0
4 3 2 1 0 2 1 0
The figure below shows the same pulse train with
CO.EnableInitalDelayOnRetrigger
set to
the default False.
Figure 78. Retriggerable Single Pulse Generation False
SOURCE
GATE
(Start Trigger)
OUT
5
3
2
3
Counter
Load Values
4 3 2 1 0 2 1 0
4 3 2 1 0 2 1 0
Note
The minimum time between the trigger and the first active edge is two ticks
of the source.
For information about connecting counter signals, refer to the
section.
Continuous Pulse Train Generation
This function generates a train of pulses with programmable frequency and duty cycle. The
pulses appear on the Counter
n
Internal Output signal of the counter.
You can specify a delay from when the counter is armed to the beginning of the pulse train.
The delay is measured in terms of a number of active edges of the Source input.
You specify the high and low pulse widths of the output signal. The pulse widths are also
measured in terms of a number of active edges of the Source input. You also can specify the
active edge of the Source input (rising or falling).
The counter can begin the pulse train generation as soon as the counter is armed, or in
response to a hardware Start Trigger. You can route the Start Trigger to the Gate input of the
counter.
You also can use the Gate input of the counter as a Pause Trigger (if it is not used as a Start
Trigger). The counter pauses pulse generation when the Pause Trigger is active.
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cRIO-904x User Manual
