Nagasaki PC104-688VL, User Manual

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NAGASAKI IPC
62
Parallel Ports
Register Address
Port Address Read/Write Register
Base + 0 Write Output data
Base + 0 Read Input data
Base + 1 Read Printer status buffer
Base + 2 Write Printer control
latch
Printer Interface Logic
The parallel portion of the SMC37C669 makes the attachment of various devices that
accept eight bits of parallel data at standard TTL level.
Data Swapper
The system microprocessor can read the contents of the printer’s Data Latch through
the Data Swapper by reading the Data Swapper address
Printer Status Buffer
The system microprocessor can read the printer status by reading the address of the
Printer Status Buffer. The bit definitions are described below:
X X X
1 2 3 4 5 6 7 0
-ERROR
SLCT
PE
-ACK
-BUSY
NOTE: X represents not used.