Nagasaki PC104-688VL User Manual Download Page 1

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NAGASAKI IPC

IPC Solution

Website: http://

www.nagasaki.com

.tw

Email: [email protected]

PC104-688VL VIA Eden PC/

104 CPU Board User’s Manual

Feb 2004

Version: 1.0

Part Number: PC104-

688VL

Summary of Contents for PC104-688VL

Page 1: ...NAGASAKI IPC IPC Solution Website http www nagasaki com tw Email sales nagasaki com tw PC104 688VL VIA Eden PC 104 CPU Board User s Manual Feb 2004 Version 1 0 Part Number PC104 688VL ...

Page 2: ...mance or use of this document Trademarks Trademarks brand names and products names mentioned in this publication are used for identification purpose only and are the properties of their respective owners Technical Support If you have problems or difficulties in using the system board or setting up the relevant devices and software that are not explained in this manual please contact our service en...

Page 3: ...r 7 J3 RJ45 LAN Adapter Connector with LED indicators 8 J2 Keyboard Mouse Connector 9 J5 External Speaker Header 9 CN4 Audio Connector 10 CN8 USB Connector 10 FB4641 Provides Audio and USB Board 11 LED1 Power Watchdog J6 External HDD LED Header 11 CN7 IDE hard Disk Connectors 12 CN6 26 pin Parallel Port Connector 26 pin 2 0mm IDC 13 CN2 CN3 Serial Port Connectors RS 232C Pin Definitions 14 J7 JP1 ...

Page 4: ...Chapter 5 Driver and Utility 45 VGA Audio Driver for WIN98 WIN95 45 BIOS Flash Utility 46 LAN Utility 46 Watchdog Timer 47 Watchdog Timer Setting 48 Watchdog Timer Enabled 48 Watchdog Timer Trigger 48 Watchdog Timer Disabled 48 Chapter 6 Technical Reference 49 Trouble Shooting for Error Messages 49 Technical Reference 52 Real Time Clock and Non Volatile RAM 52 CMOS RAM Map 54 I O Port Address Map ...

Page 5: ...v Appendix 65 Dimension 65 PC104 688VL 錯誤尚未定義書籤 FB4605 66 FB4641 66 ...

Page 6: ......

Page 7: ...nd a onboard VGA port up to 8MB share memory that can support CRT Each PC104 688VL has two ports for I O communications Two RS 232 ports are available There is also a watchdog timer that can be configured from software to automatically reset the system And for easy configuration AMI BIOS are available Power management is also featured to lower the rate of consumption The unit supports doze mode Su...

Page 8: ...NAGASAKI IPC 2 Layout ...

Page 9: ...edded supports CRT up to 8MB shared memory One parallel port two RS 232 two USB and One PCI IDE interface PS 2 compatible keyboard and mouse interface Provides header for external speaker and hard disk access LED Software programmable watchdog timer Provides cooling fan connector for monitoring Provides One AC97 Audio function Flash BIOS with easy upgrade utility PC 104 form factor 90 2 mm x 95 9 ...

Page 10: ...the PC104 688VL it is recommended that you keep the diskette or CD that contains drivers and document files document copies and unused cables in the cartoon for future use The following lists the accessories that may be included in your PC104 688VL package Some accessories are optional items that are only shipped upon order One PC104 688VL All In One PC 104 CPU board One VGA CRT interface adapter ...

Page 11: ...rap to prevent the generation of Electricity Static Discharge ESD The ESD may be created from human body that touches the board It may do damage to the board circuit 2 Install or unplug any connector module or add on card be sure that the power is disconnected from the system board If not this may damage the system board components module or the add on card 3 Installing a heat sink and cooling fan...

Page 12: ...C97 signals for Audio and USB CN5 10 pin CRT connector CN6 26 pin 2 0mm parallel port connector CN7 44 pin 2 0mm IDE 2 hard disk connector J1 3 pin for case CPU cooling fan J2 5 pin for Keyboard and Mouse connector J3 10 pin for RJ45 Lan connector J4 2 pin Reset header J5 2 pin for external speaker header J6 2 pin for HDD LED indicator J7 2 pin External battery header J8 4 pin Power connector JP1 ...

Page 13: ...eader for connecting to system reset bottom Short circuit these 2 pins to hardware reset PC104 688VL as well as restart system It is similar to power off the system and then power it on again Pin 1 VCC 5V Pin 2 Ground Pin 3 Ground Pin 4 VDD 12V J8 4 1 Pin 1 Reset Pin 2 Reset 1 2 J4 ...

Page 14: ... off line J3 provide twist pair signals of LAN port if you got LAN version and adapter board FB4605A with cable The following table lists the pin assignments of J3 to RJ45 connector on the FB4605A LAN adapter board The following lists the pin assignment of J3 J3 Signal RJ45 J3 Signal RJ45 1 TPTX 1 6 Access LED 2 TPTX 2 7 On Line LED 3 TPRX 3 8 Case GND 4 TPRX 6 FBG1 4 9 FBG1 5 FBG2 7 5 LED Common ...

Page 15: ...T connector use the included adapter cable you can attach standard PS 2 type keyboard and mouse J5 External Speaker Header PIN Signal 1 Speaker 2 Speaker J2 6 1 Pin 1 Mouse Data Pin 2 Keyboard Data Pin 3 Ground Pin 4 VCC Pin 5 Mouse Clock Pin 6 Keyboard Clock 1 2 J5 ...

Page 16: ...ations CN8 USB Connector Use the USB adapter cable and FB4641 board you can attach up to 2 USB devices CN4 Description CN4 Description 1 BITCLK 2 12v 3 5V 4 SYNC 5 Ground 6 Ground 7 3 3V 8 ACRST 9 SDOUT 10 SPKR 11 SDIN 12 SDIN2 Pin 1 USBV0 Pin2 Case Ground Pin 3 USBD0 Pin4 USBG1 Pin 5 USBD0 Pin6 USBD1 Pin 7 USBG0 Pin8 USBD1 Pin9 Case Ground Pin10 USBV1 CN8 10 2 9 1 11 CN4 2 12 1 ...

Page 17: ... and 2 way Lineout respectively You can connectors J1 CN2 cable from PC104 688VL CN4 and CN8 The following figure shows these Audio connectors on FB4641 board J5 J4 J3 CN1 CN3 J1 J2 CN2 LED1 Power Watchdog J6 External HDD LED Header 1 2 J6 Pin1 HDD LED Pin2 HDD LED Line Out Line In Mic In J3 J4 J5 Connector to PC104 688VL CN4 CN8 ...

Page 18: ... GROUND 3 DATA 7 4 DATA 8 5 DATA 6 6 DATA 9 7 DATA 5 8 DATA 10 9 DATA 4 10 DATA 11 11 DATA 3 12 DATA 12 13 DATA 2 14 DATA 13 15 DATA 1 16 DATA 14 17 DATA 0 18 DATA 15 19 GROUND 20 NOT USED 21 IDEDREQ 22 GROUND 23 IOW A 24 GROUND 25 IOR A 26 GROUND 27 IDEIORDYA 28 GROUND 29 DACKA 30 GROUND 31 AINT 32 GROUND 33 SA 1 34 Not Used 35 SA 0 36 SA 2 37 CS 0 38 CS 1 39 HD LED A 40 GROUND 41 VCC 42 VCC 43 G...

Page 19: ...Description CN6 DB 25 Description 1 1 STROBE 2 14 AUTO FORM FEED 3 2 DATA 0 4 15 ERROR 5 3 DATA 1 6 16 INITIALIZE 7 4 DATA 2 8 17 PRINTER SELECT IN 9 5 DATA 3 10 18 Ground 11 6 DATA 4 12 19 Ground 13 7 DATA 5 14 20 Ground 15 8 DATA 6 16 21 Ground 17 9 DATA 7 18 22 Ground 19 10 ACKNOWLEDGE 20 23 Ground 21 11 BUSY 22 24 Ground 23 12 PAPER 24 25 Ground 25 13 PRINTER SELECT 26 No Used ...

Page 20: ...adapter cables are used to transfer 10 pin 2 0mm IDC into standard DB 9 connector The following tables show the signal connections of these connectors and the included adapter cable for CN2 CN3 CN2 CN3 RS 232 Signal DB9 1 DCD2 1 2 DSR2 6 3 RXD2 2 4 RTS2 7 5 TXD2 3 6 CTS2 8 7 DTR2 4 8 RI2 9 9 GROUND 5 10 GROUND Shield 5 1 9 6 DB9 CN2 CN3 2 1 9 10 ...

Page 21: ...S Data You can use JP1to clear CMOS data The CMOS store information like system date time boot up device password IRQ that are set up with the BIOS To clear the CMOS set JP1 to open then return to 1 2 before system is power off The default setting is 1 2 Normal Operation Clear CMOS Data 1 3 2 JP1 1 3 2 JP1 External Battery Header 1 2 J7 Pin1 Battery Pin2 Battery Note 2 6V to 3 6V 1 3 2 JP1 1 3 2 J...

Page 22: ...27 SA4 B11 SMEMW B27 TC A12 SA19 A28 SA3 B12 SMEMR B28 ALE A13 SA18 A29 SA2 B13 IOW B29 5V A14 SA17 A30 SA1 B14 IOR B30 OSC A15 SA16 A31 SA0 B15 DACK3 B31 Ground A16 SA15 A32 Ground B16 DRQ3 B32 Ground PC 104 C D Pin Pin Signal Pin Signal Pin Signal Pin Signal C1 GND C11 MEMW D1 Ground D11 DACK 5 C2 SBHE C12 SD8 D2 MEMCS16 D12 DREQ5 C3 LA23 C13 SD9 D3 IOCS16 D13 DACK 6 C4 LA22 C24 SD10 D4 IRQ10 D1...

Page 23: ...NAGASAKI IPC 17 DIMM1 So DIMM Socket The DIMM1 socket on the solder side accepts 32MB to 512MB PC 100 SDRAM modules DIMM1 ...

Page 24: ...NAGASAKI IPC 18 ...

Page 25: ...t 8MB simulated VRAM allows a maximum CRT resolution of 1280X1024 with 64K colors The following table and figure illustrate the pin definition of CN5 and D sub 15 pin on the CRT adapter cable CN5 Signal DB 15 CN5 Signal DB15 1 RED 1 2 Case Ground Case 3 GREEN 2 4 Digital Ground 5 10 5 BLUE 3 6 Analog Ground 6 7 8 7 VSYNC 14 8 DDC Data 12 9 HSYNC 13 10 DDC Clock 15 NOTE Be careful with the pin orie...

Page 26: ...NAGASAKI IPC 20 ...

Page 27: ...irmware that interacts directly with the hardware components and facilitates interaction between the system hardware and the operating system The BIOS default values ensure that the system will function at its normal capability In the worst situation the user may have corrupted the original settings set by the manufacturer All the changes you make will be saved in the system RAM and will not be lo...

Page 28: ...Auto Configuration with Optimal Settings to auto configure the system according to optimal setting with pre defined values This is also the factory default setting of the system when you receive the board 12 Auto Configuration with Fail Safe Settings to configure the system in fail safe mode with predefined values 13 Save Settings and Exit perform this function when you change the setting and exit...

Page 29: ...it the current menu or message Page Up Page Down To select a parameter F1 To display the help menu if you do not know the purpose or function of the item you are going to configure F2 F3 To change the color of the menu display F2 is to go forward and F3 is to go backward UP Down Arrow Keys To go upward or downward to the desired item ...

Page 30: ...For information on how to create this file please refer to the MS DOS manual Hard Disk Setup The BIOS supports various types for user settings The BIOS supports Pri Master Pri Slave Sec Master and Sec Slave so the user can install up to four hard disks For the master and slave jumpers please refer to the hard disk s installation descriptions and the hard disk jumper settings You can select AUTO un...

Page 31: ...se the system to halt and display a warning message If this occurs you can either allow the operation to continue or use a bootable virus free floppy disk to reboot and investigate your system The default setting is Disabled This setting is recommended because it conflicts with new operating systems Installation of new operating system requires that you disable this to prevent write errors ...

Page 32: ... 1 BIOS will not wait for up to 40 seconds if a Ready signal is not received from the IDE drive and will not configure its drive 2 BIOS will not wait for 0 5 seconds after sending a RESET signal to the IDE drive 3 You cannot run BIOS Setup at system boot since there is no delay for the Hit Del To run Setup message Available Options Disabled Enabled Default setting Enabled 1st 3rd Boot Device These...

Page 33: ...s field specifies the read write access when booting from a floppy drive Available options Normal Read only Default setting Normal Hard Disk Access Control This field specifies the read write access when booting from a HDD drive Available options Normal Read only Default setting Normal S M A R T for Hard Disk This field is used to activate the S M A R T System Management and Reporting Technologies...

Page 34: ...et if the BIOS will seek the floppy A drive upon boot Available Options Disabled Enabled Default setting Disabled PS 2 Mouse Support The setting of Enabled allows the system to detect a PS 2 mouse on boot up If detected IRQ12 will be used for the PS 2 mouse IRQ 12 will be reserved for expansion cards if a PS 2 mouse is not detected Disabled will reserve IRQ12 for expansion cards and therefore the ...

Page 35: ...d and the system RAM is over 64MB please select yes Otherwise select No Available options Yes No Default setting No Wait for F1 If Error AMIBIOS POST error messages are followed by Press F1 to continue If this field is set to Disabled the AMIBIOS does not wait for you to press the F1 key after an error message Available options Disabled Enabled Default setting Disabled Hit DEL Message Display Set ...

Page 36: ...ents of the video ROM cannot be read from or written to cache memory 2 Enabled The contents of C000h C7FFFh are written to the same address in system memory RAM for faster execution 3 Cached WP The contents of the named ROM area are written to the same address in system memory RAM for faster execution if an adapter ROM will be using the named ROM area Also the contents of the RAM area can be read ...

Page 37: ...quencies If the installed SDRAM supports SPD function select SPD If not you can select based on other access time of the SDRAM Available Options Disabled Enabled Default setting Disabled DRAM Frequency This specifies the SDRAM memory clock frequency Available Options 100MHz 133MHz Default setting 100MHz SDRAM CAS Latency SCLKs This field specifies the latency for the Synchronous DRAM system memory...

Page 38: ...re Size This field specifies the system memory size that can be used by the Accelerated Graphics Port AGP Available Options 4MB 8MB 16MB 32MB 64MB 128MB and 256MB Default setting 64 MB USB Control Select Enabled if a USB device is installed to the system If Disabled are selected the system will not be able to use a USB device Available Options Disabled Enabled Default setting Enabled USB Device Le...

Page 39: ...mory architecture SMA for frame buffer memory SMA allows system memory to be efficiently share by the host CPU and allocated depending on user preference application requirements and total size of system memory Available Options None 2MB 4MB and 8MB Default setting 2 MB ...

Page 40: ...s field specifies the power conserving state that video subsystem enters after the specified period of display inactivity has expired Available Options Disabled Standby Suspend Default setting Disabled Hard Disk Power Down Mode This field specifies the power conserving state that the hard disk drive enters after the specified period of hard drive inactivity has expired Available Options Disabled S...

Page 41: ...s length of time expires the system enters Suspend power state Available Options Disabled 1 Minute 2 Minute 4 Minute and 8 Minute up to 60 Minute Default setting Disabled Throttle Slow Clock Ratio When the system enter Suspend or standby mode the CPU clock runs only part of the time You may select the percent of time that the clock runs Available Options 0 6 25 25 37 5 75 87 5 and 93 75 100 Defaul...

Page 42: ... Timer This field specifies the latency timings in PCI clock PCI devices installed in the PCI expansion bus Available Options 32 64 96 128 160 192 224 and 248 Default setting 64 Primary Graphics Adapter This field specifies which VGA display will be used when the system is boot You can select either the onboard AGP or the VGA card installed on the PCI bus Available Options AGP PCI Default setting ...

Page 43: ...ed you can assign an IRQ to this device Selecting Yes BIOS will auto assign IRQ to the device Selecting No no IRQ will be assigned to the VGA device Available Options Yes No Default setting No PCI IDE BusMaster This option is to specify that the IDE controller on the PCI local bus have bus mastering capability Available Options Enable Disable Default setting Disable DMA Channel 0 7 When I O resour...

Page 44: ... as one of the following types based on the type of device using the interrupt ISA EISA devices comply with the original PC AT bus specification requiring a specific interrupt Such as IRQ5 for COM1 PnP PCI ISA devices comply with the Plug and Play standard whether designed for PCI or ISA bus architecture ...

Page 45: ...fault setting Auto OnBoard Serial Port 1 These fields select the I O port address for each Serial port Refer to Table 2 2 Available Options Auto Disabled 3F8H COM1 2F8H COM2 and 3E8H COM3 2E8H COM4 Default setting Auto OnBoard Serial Port 2 These fields select the I O port address for each Serial port Refer to Table 2 2 Available Options Auto Disabled 3F8H COM1 2F8H COM2 and 3E8H COM3 2E8H COM4 De...

Page 46: ...s the parallel port mode ECP and EPP are both bi directional data transfer schemes that adhere to the IEEE P1284 specifications Available Options N A Normal Bi Dir EPP and ECP Default setting Normal Parallel Port IRQ This field specifies the IRQ for the parallel port Available Options Auto N A 5 7 Default setting Auto Parallel Port DMA Channel This option is only available if the setting for the p...

Page 47: ...Default setting Enable Sound Blaster This field if you want to use the Sound Blaster emulation feature Available Options Disable Enable Default setting Disable SB I O Base Address These fields select the I O port address for Audio Available Options 220H 22FH 240H 24FH 260H 26FH and 280 28FH Default setting 220H 22FH SB IRQ Select This field specifies the IRQ for the Audio Available Options Disable...

Page 48: ...t up or monitor the system temperature CPU voltage and VIA C3 CPU Ration and CPU fan speed System Hardware Monitor In this field you can monitor or detect the followings items These items are view only and cannot be changed Current System Temperature Fan1 Speed CPU1 VCORE CPU VTT 3 300V ...

Page 49: ...pervisor password is set up 4 Enter Advanced CMOS Setup screen and point to the Password Checkup field 5 Select Always or Setup Always a visitor who attempts to enter BIOS or operating system will be prompted for password Setup a visitor who attempts to the operating system will be prompted for user password You can enter either User password or Supervisor password 6 Point to Save Settings and Exi...

Page 50: ...NAGASAKI IPC 44 ...

Page 51: ...w screen appears with the Update Driver button and then system will search VGA drive file starting form A drive Step 4 As the installation is completed the system will generate the message as follows Yes I want to restart my computer now Installation is done No I will restart my computer later System must be restart then complete the installation Step 5 In the WINDOWS98 ME you can find the DISPLAY...

Page 52: ...is the newest program user can use it to modify BIOS function in the future when the BIOS add some functions LAN Utility Step 1 To install the LAN utility OR driver insert the CD ROM into the CD ROM device and enter DRIVER LAN RTL8139C DIAG If your system is not equipped with a CD ROM device copy the LAN VGA driver from the CD ROM to a 1 44 diskette Step 2 Execute install exe file Note In the LAN ...

Page 53: ... can use your own program to enable the watchdog timer Once you have enabled the watchdog timer the program should trigger the I O every time before the timer times out If your program fails to trigger or disable this timer before it times out e g because of a system hang up it will generate a reset signal to reset the system The time out period can be programmed to be set from 1 to 256 seconds or...

Page 54: ... be set to non zero value to watchdog counter and start to count down again If your program fails to trigger the watchdog timer before time out it will generate a reset pulse to reset the system The factor of the watchdog timer time out constant is approximately 1 second The period for the watchdog timer time out period is between 1 to 256 timer factors If you want to reset your system when watchd...

Page 55: ...s and connectors are in proper position and firmly attached If the errors still exist please contact with your distributor for maintenance POST BEEP Currently there are two kinds of beep codes in BIOS setup One indicates that a video error has occurred and the BIOS cannot initialize the video screen to display any additional information This beep code consists of a single long beep followed by thr...

Page 56: ...ormatted Then reboot the system DISKETTE DRIVES OR TYPES MISMATCH ERROR When the diskette drive type is different from CMOS please run setup or configure the drive again ERROR ENCOUNTERED INITIALIZING HARD DRIVE When you can t initialize the hard drive ensure the following things 1 The adapter is installed correctly 2 All cables are correctly and firmly attached 3 The correct hard drive type is se...

Page 57: ... or removed since last boot In EISA mode use Configuration Utility to re configure the memory configuration In ISA mode enter BIOS Setup and enter the new memory size in the memory fields MEMORY VERIFYING ERROR It indicates an error verifying a value is already written to memory Use the location along with your system s memory map to locate the bad chip OFFENDING ADDRESS MISSING This message is us...

Page 58: ...an be maintained for long periods of time using an internal Lithium battery The contents of each byte in the CMOS RAM are listed below Address Description 00 Seconds 01 Second alarm 02 Minutes 03 Minute alarm 04 Hours 05 Hour alarm 06 Day of week 07 Date of month 08 Month 09 Year 0A Status register A 0B Status register B 0C Status register C 0D Status register D 0E Diagnostic status byte 0F Shutdo...

Page 59: ...on memory byte 18 High expansion memory byte 19 2D Reserved 2E 2F 2 byte CMOS checksum 30 Low actual expansion memory byte 31 High actual expansion memory byte 32 Date century byte 33 Information flags set during power on 34 7F Reserved for system BIOS ...

Page 60: ...d 1 Enabled 15h Base Memory in 1KB increments Low Byte 16h Base Memory in 1KB increments High Byte 17h IBM compatible memory in 1KB increments Low Byte 18h IBM compatible memory in 1KB increments High Byte max 15 MB 19h 2Dh Varies 2Eh Standard CMOS RAM checksum high byte 2Fh Standard CMOS RAM checksum low byte 30h IBM compatible Extended Memory Low Byte POST in KB 31h IBM compatible Extended Memor...

Page 61: ... Time Clock NMI 080h 09Fh DMA Page Register 0A0h 0BFh Interrupt Controller 2 0C0h 0DFh DMA Controller 2 0F0h 0FFh Math Coprocessor 1F0h 1F7h IDE Interface 278h 27Fh Parallel Port 2 LPT2 2F8h 2FFh Serial Port 2 COM2 378h 3FFh Parallel Port 1 LPT1 3B0h 3BFh Monochrome Printer adapter 3C0h 3CFh EGA adapter 3D0h 3DFh CGA adapter 3F0h 3F7h Floppy Disk Controller 3F8h 3FFh Serial Port 1 COM1 400h 40Fh P...

Page 62: ...red The following table shows the IRQ used by the devices on the Industrial CPU Card Level Function IRQ0 System Timer Output IRQ1 Keyboard IRQ2 Interrupt Cascade IRQ3 Serial Port 2 IRQ4 Serial Port 1 IRQ5 Reserved IRQ6 Floppy Disk Controller IRQ7 Parallel Port 1 IRQ8 Real Time Clock IRQ9 Reserved IRQ10 USB IRQ11 Ethernet IRQ12 PS2 Mouse IRQ13 Math coprocessor IRQ14 Primary IDE IRQ15 Secondary IDE ...

Page 63: ...vention The two DMA controllers are internally cascaded to provide four DMA channels for transfers to 8 bit peripherals DMA1 and three channels for transfers to 16 bit peripherals DMA2 DMA2 channel 0 provides the cascade interconnection between the two DMA devices thereby maintaining IBM PC AT compatibility The following is the system information of DMA channels DMA Controller 1 DMA Controller 2 C...

Page 64: ...rol capability and a processor interrupt system that may be software tailored to the computing time required to handle the communications link The following table is a summary of each ACE accessible register DLAB Port Address Register Receiver buffer read 0 Base 0 Transmitter holding register write 0 Base 1 Interrupt enable X Base 2 Interrupt identification read only X Base 3 Line control X Base 4...

Page 65: ...0 if Interrupt Pending Bit 1 Interrupt ID Bit 0 Bit 2 Interrupt ID Bit 1 Bit 3 Must be 0 Bit 4 Must be 0 Bit 5 Must be 0 Bit 6 Must be 0 Bit 7 Must be 0 Line Control Register LCR Bit 0 Word Length Select Bit 0 WLS0 Bit 1 Word Length Select Bit 1 WLS1 WLS1 WLS0 Word Length 0 0 5 Bits 0 1 6 Bits 1 0 7 Bits 1 1 8 Bits Bit 2 Number of Stop Bit STB Bit 3 Parity Enable PEN Bit 4 Even Parity Select EPS B...

Page 66: ... 0 Line Status Register LSR Bit 0 Data Ready DR Bit 1 Overrun Error OR Bit 2 Parity Error PE Bit 3 Framing Error FE Bit 4 Break Interrupt BI Bit 5 Transmitter Holding Register Empty THRE Bit 6 Transmitter Shift Register Empty TSRE Bit 7 Must be 0 MODEM Status Register MSR Bit 0 Delta Clear to Send DCTS Bit 1 Delta Data Set Ready DDSR Bit 2 Training Edge Ring Indicator TERI Bit 3 Delta Receive Line...

Page 67: ...S LS MS Bit 0 Bit 0 Bit 8 Bit 1 Bit 1 Bit 9 Bit 2 Bit 2 Bit 10 Bit 3 Bit 3 Bit 11 Bit 4 Bit 4 Bit 12 Bit 5 Bit 5 Bit 13 Bit 6 Bit 6 Bit 14 Bit 7 Bit 7 Bit 15 Desired Baud Rate Divisor Used to Generate 16x Clock 300 384 600 192 1200 96 1800 64 2400 48 3600 32 4800 24 9600 12 14400 8 19200 6 28800 4 38400 3 57600 2 115200 1 ...

Page 68: ...hment of various devices that accept eight bits of parallel data at standard TTL level Data Swapper The system microprocessor can read the contents of the printer s Data Latch through the Data Swapper by reading the Data Swapper address Printer Status Buffer The system microprocessor can read the printer status by reading the address of the Printer Status Buffer The bit definitions are described b...

Page 69: ... another Normally this signal will be active for approximately 5 microseconds before receiving a BUSY message stops Bit 5 A 1 means the printer has detected the end of the paper Bit 4 A 1 means the printer is selected Bit 3 A 0 means the printer has encountered an error condition Printer Control Latch Printer Control Swapper The system microprocessor can read the contents of the printer control la...

Page 70: ... this position allows an interrupt to occur when ACK changes from low state to high state Bit 3 A 1 in this bit position selects the printer Bit 2 A 0 starts the printer 50 microseconds pulse minimum Bit 1 A 1 causes the printer to line feed after a line is printed Bit 0 A 0 5 microsecond minimum highly active pulse clocks data into the printer Valid data must be present for a minimum of 0 5 micro...

Page 71: ...NAGASAKI IPC 65 Appendix Dimension PC104 688VL Unit mm 3 9 32 3 14 7 20 1 30 8 39 4 95 9 7 6 73 7 90 2 13 7 16 24 3 19 6 35 7 15 8 85 7 5 1 5 1 80 26 7 25 4 ...

Page 72: ...NAGASAKI IPC 66 FB4605 FB4641 Unit mm 4 8 4 6 4 31 5 1 3 1 0 1 0 9 9 4 1 9 7 8 8 2 8 5 4 4 24 14 8 9 5 4 6 6 5 50 1 6 7 5 3 1 2 1 1 0 1 0 1 2 6 3 6 3 1 9 4 16 3 35 1 19 6 2 5 ...

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