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FZ3 Deep Learning Accelerator Card
Hardware Manual
Figure 4-3-2
4.3.3 Expansion IO
This development board uses two 2x20PIN 2.54 pin headers for IO expansion, including
12V, 5V, 3.3V, 1.8V and other power output, CAN, RS485, USB2.0x2, 4xPSMIO, 40PIN PL
terminal IO and other signals. The interfaces are J15 and J16. For the detailed signal
definition and details, please refer to the schematic diagram and the ROUTE length form.
The applicable connector specifications are in the CD-ROM.
Figure 4-3-2
