Multitone RPR 583, Technical Manual

Page: 38 / 91

RPR 583
TM1212 Issue 1 Page 3 - 6
The output from FL403 is split: one output connects through C450 to pin 6 of IC401
and the IF amplifier; the other connects to the Received Signal Strength Indicator
(RSSI) circuit in IC401 through C419, R407 and pin 5.
Due to the characteristics of filters FL401, FL402 and FL403, the signal at the input
to the IF amplifier has amplitude modulation (AM). The AM must be removed before
the signal reaches the detector stage. This is performed by the IF amplifier in IC401
which has very high gain and is designed to limit the amplitude of the signal to
remove the AM component and give a ‘square’ output. C479 and C480 provide
de-coupling for the amplifier.
The output from the IF amplifier passes to the detector in IC401. This circuit is a
Quadrature Demodulator which has two inputs. One input connects directly to the
IF amplifier, the other receives the signal from the IF amplifier through a phase delay
circuit connected to pins 9 and 10 of the IC. The phase delay depends on the
frequency of the IF signal and is 90 degrees at the centre frequency of the unit’s
allocated channel. The phase shift is provided by ceramic discriminator FL404,
capacitor C426 and resistor R416.
The RSSI circuit in IC401 provides an Automatic Gain Control (AGC) signal for the
receiver. The circuit detects the received signal strength and gives a DC current
out. R407 sets the level at which the circuit starts to operate. The value of 68
kilohms sets it to approximately 16dB above the sensitivity threshold. The DC output
from pin 22 of the IC connects to the AGC control circuit. When there is no RSSI
output, transistor TR407 is biased on and keeps the RF amplifier at full gain. At
strong signal levels the output from the RSSI causes TR407 to cut off gradually, thus
reducing the gain of the RF amplifier. C437 determines the rise and fall times of the
AGC.
The output from the detector stage, pin 11, gives an audio output to TP401. This
test point is used in the final stages of production to align the receiver circuits.
TP401 is also used to program the decoder section of the unit and connects to the
microprocessor (IC3) on the decoder board through PL401/SK1, pin 13. In addition,
pin 13 connects to the external PROG connection on the back of the unit, which
allows the microprocessor to communicate with the paging management system,
when the unit is in the ‘Absence/Charging Rack’.
Pin 11 of IC401 also connects to pin 12 through R425, R429 and R428. These
resistors together with capacitors C448, C483, C484 and the internal filter amplifier
of IC401 form the data filter; a unity-gain, low-pass filter which reduces high
frequency noise. The output of the filter amplifier connects internally to the FSK
Comparator. The data output of the comparator, pin 18, connects to microprocessor
IC3, pin 36 through PL401/SK1, pin 11. A logic signal from IC3, pin 58 to IC401, pin
16 controls the Fast/Slow charge of the comparator. The logic level at pin 16 is
always set high.