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DESIGN CONSIDERATIONS
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MultiConnect
®
PCIe MTPCIE-H5/MTPCIE-BW Developer Guide
Chapter 3 – Design Considerations
Design Consideration
When using the Multi-Tech MiniPCIe form factor:
Consult your modem’s device guide for device dimensions. With the modem, the Multi-Tech Mini PCIe form
factor exceeds the standard Mini PCIe maximum component height for top and bottom.
If you need to install components under the module, use taller connectors to avoid conflict. Multi-Tech
recommends not installing components under the module.
Check the
table for pins that differ from the MiniPCIe spec.
Noise Suppression Design
Adhere to engineering noise-suppression practices when designing a printed circuit board (PCB). Noise suppression
is essential to the proper operation and performance of the modem and surrounding equipment.
Any OEM board design must consider both on-board and off-board generated noise that can affect digital signal
processing. Both on-board and off-board generated noise that is coupled on-board can affect interface signal levels
and quality. Noise in frequency ranges that affect modem performance is of particular concern.
On-board generated electromagnetic interference (EMI) noise that can be radiated or conducted off-board is
equally important. This type of noise can affect the operation of surrounding equipment. Most local government
agencies have certification requirements that must be met for use in specific environments.
Proper PC board layout (component placement, signal routing, trace thickness and geometry, and so on)
component selection (composition, value, and tolerance), interface connections, and shielding are required for the
board design to achieve desired modem performance and to attain EMI certification.
Other aspects of proper noise-suppression engineering practices are beyond the scope of this guide. Consult noise
suppression techniques described in technical publications and journals, electronics and electrical engineering text
books, and component supplier application notes.
PC Board Layout Guideline
In a 4-layer design, provide adequate ground plane covering the entire board. In 4-layer designs, power and ground
are typically on the inner layers. Ensure that all power and ground traces are 0.05 inches wide.
The recommended hole size for the device pins is 0.036 in. +/-0.003 in. in diameter. Use spacers to hold the device
vertically in place during the wave solder process.
All creepages and clearances for the device meet requirements of safety standards listed in the technical
specifications. The requirements are based on a working voltage of 125V or 250V. When implementing the
recommended DAA* circuit interface in a third party design, strictly follow all creepage and clearance
requirements to meet safety standards. The third party safety design must be evaluated by the appropriate
national agency according to the required specification.
User Accessible Areas
Based on where the third party design is marketed, sold, or used, it may be necessary to provide an insulating
cover over all TNV exposed areas. Consult with the recognized safety agency to determine the requirements.
Summary of Contents for MultiConnect MTPCIE-BW
Page 1: ...MultiConnect PCIe MTPCIE H5 MTPCIE BW Developer Guide...
Page 20: ...DEVELOPER BOARD AND SCHEMATICS 20 MultiConnect PCIe MTPCIE H5 MTPCIE BW Developer Guide...
Page 22: ...DEVELOPER BOARD AND SCHEMATICS 22 MultiConnect PCIe MTPCIE H5 MTPCIE BW Developer Guide Bottom...
Page 25: ...DEVELOPER BOARD AND SCHEMATICS MultiConnect PCIe MTPCIE H5 MTPCIE BW Developer Guide 25...
Page 26: ...DEVELOPER BOARD AND SCHEMATICS 26 MultiConnect PCIe MTPCIE H5 MTPCIE BW Developer Guide...
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Page 32: ...DEVELOPER BOARD AND SCHEMATICS 32 MultiConnect PCIe MTPCIE H5 MTPCIE BW Developer Guide...
Page 51: ...MECHANICAL DRAWING MultiConnect PCIe MTPCIE H5 MTPCIE BW Developer Guide 51 MTPCIE BW...